eee483654a
use radix literals
2011-11-23 19:03:40 -08:00
6e237abb5e
cpu.x86.assembler: add MOVABS instruction
...
MOVABS generates the one-byte opcode version of MOV eAX, [absolute] or MOV [absolute], eAX, which saves a byte per safepoint on x86-32.
2011-10-27 21:14:45 -07:00
3af17c6bfc
cpu.x86.assembler: add MOVQ xmm, xmm/m64 and MOVQ xmm/m64, xmm instructions
2010-07-08 10:19:11 -07:00
d05bb6e5d7
cpu.x86.assembler: drop useless ST0 operand from some x87 instructions
2010-05-18 19:37:59 -04:00
4b2f4fc72e
cpu.x86.assembler: AH CH DH BH register operands now work properly
2010-05-18 17:10:32 -04:00
62b882937a
cpu.x86.assembler: a choice selection of x87 instructions
2010-05-17 02:02:40 -07:00
3b28648fa3
cpu.x86.assembler: BT family instructions
2010-05-15 13:08:22 -07:00
94e6ed142d
cpu.x86.assembler: fix test on 64-bit
2010-05-03 20:16:13 -04:00
1bde985228
cpu.x86.assembler: small cleanups
2010-05-03 17:34:15 -04:00
a5e4eb1948
cpu.x86.assembler: support all addressing modes
2010-05-03 17:34:06 -04:00
639a1f7043
cpu.x86.assembler: add support for absolute addressing on x86-64; [RIP+] now behaves like [] did, and [] now does absolute addressing just like in 32-bit mode
2010-04-04 19:42:57 -04:00
a8eeff7c48
cpu.x86.assembler: add segment override prefixes
2010-03-31 20:47:13 -04:00
467c389948
cpu.x86.assembler: make SSE shuffle instructions accept an array of indexes so they're easier to use
2009-09-28 11:45:45 -05:00
b49fb43b60
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 11:05:36 -05:00
c59c619364
add additional SSE2 packed integer operations
2009-07-30 11:05:12 -05:00
226908d2d2
cpu.x86.assembler: fix extended 8-bit registers (DIL, SIL, SPL, BPL)
2009-07-29 22:32:22 -05:00
7831293fda
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
4c664a469a
SSE4 opcodes for x86 assembler
2009-07-28 12:19:37 -05:00
1fe11f7c87
SSE1–SSSE3 opcodes + branch hints for x86 assembler
2009-07-28 00:22:27 -05:00
a61a992bfd
cpu.x86.assembler: IMUL2 instruction was busted for immediate operands
...
When given a register and an immediate, it would generate imul imm,dst,dst however the 64-bit prefix was generated wrong and if dst was an extended register only the first operand would be an extended register. To fix this, change IMUL2 to not work on immediates anymore, and added a new IMUL3 that takes a destination register, source register, and immediate. Also, change compiler.cfg.two-operand to not two-operandize %mul-imm, since this isn't needed anymore.
This fixes the sporadic benchmark.tuple-arrays crash on 64-bit machines.
2009-06-08 21:15:52 -05:00
5188f4e1f0
Fix TEST opcode in cpu.x86.assembler
2009-04-29 22:23:42 -05:00
abb02f1784
Flesh out shift instructions
2008-11-03 00:03:00 -06:00
52020c2fe3
Fixing x86 instruction encoding for addressing with base = ESP or R12
2008-10-21 23:18:27 -05:00
0c8e2584b4
Fixing unit tests for make, fry changes
2008-09-11 00:20:06 -05:00
d66f887736
Create basis vocab root
2008-07-28 22:03:13 -05:00
Joe Groff
Slava Pestov