Commit Graph

152 Commits (d65296b334142e332949f7b76f1e38dc94cf30f9)

Author SHA1 Message Date
Slava Pestov d65296b334 vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress) 2009-11-02 04:25:54 -06:00
Slava Pestov 55eb76f695 Merge branch 'master' into new_gc 2009-11-01 22:17:27 -06:00
Joe Groff 6e9bd9c631 typo in cpu.x86 2009-11-01 19:39:57 -06:00
Joe Groff 0c7f036437 clear destination register before doing CVTS* to break dependency chains 2009-11-01 18:29:12 -06:00
Joe Groff a0396f919a SSE code generation improvements: always use MOVAPS to move float xmm registers to kill dependency chains, and favor -PS versions of logical, move, and shuffle ops to shrink code size 2009-11-01 16:09:44 -06:00
Slava Pestov 051dcb6849 Merge branch 'master' into new_gc 2009-10-30 03:03:05 -05:00
Joe Groff ca8d4c15f4 add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks 2009-10-30 00:41:19 -05:00
Doug Coleman b5fd809209 memq? -> member-eq?, sorted-memq? -> sorted-member-eq? 2009-10-28 15:02:00 -05:00
Slava Pestov b78202e816 Merge branch 'master' into new_gc 2009-10-22 05:40:57 -05:00
Joe Groff 1bff41e35e oops, longlong comparison is sse4.2, not 4.1 2009-10-21 23:00:02 -05:00
Joe Groff a2976083be generate unsigned vector comparison fallbacks using min/max or xor/signed compare 2009-10-20 22:30:57 -05:00
Slava Pestov f442d1949b Change data heap alignment to 16 bytes 2009-10-20 12:45:00 -05:00
Slava Pestov a71212f9c4 cpu.x86.32: only create 16-byte parameter area if the word calls into the VM 2009-10-20 05:02:42 -05:00
Slava Pestov 0a3029d9f2 compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure 2009-10-19 04:58:29 -05:00
Slava Pestov 0726ec30f0 cpu.x86: eliminate 2 instructions form write barrier on x86-32 2009-10-15 22:07:03 -05:00
Slava Pestov 649f7531fd cpu.x86: just a cleanup 2009-10-15 05:43:28 -05:00
Slava Pestov 22e79e8495 compiler: tweak ##write-barrier-imm 2009-10-15 02:40:23 -05:00
Slava Pestov bfd1f0d6d2 vm: rt-vm relocation now supports accessing a field directly 2009-10-14 19:24:23 -05:00
Slava Pestov 10ad5cad53 Working on adding support for the new write barrier to optimized code 2009-10-14 02:06:01 -05:00
Joe Groff b82c8b4416 use TEST reg, reg to compare integer equality with zero 2009-10-10 13:13:53 -05:00
Joe Groff 2577ab83a6 only emit ##alien-vector/##set-alien-vector insns if the rep is available 2009-10-10 12:53:10 -05:00
Joe Groff 1e3c9321ae don't use MOVSLDUP/MOVSHDUP to do specialized shuffles unless sse3 is available 2009-10-10 12:00:47 -05:00
Joe Groff a7a77cd03e fix x86 uchar %scalar>integer 2009-10-10 10:39:23 -05:00
Joe Groff 5158a12d32 rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86 2009-10-09 21:26:27 -05:00
Joe Groff 98836a9e2e break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions 2009-10-07 15:27:03 -05:00
Joe Groff 43b51ef2eb decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations 2009-10-07 14:09:46 -05:00
Joe Groff 5152c3b06d sse doesn't actually have an unsigned->unsigned pack instruction 2009-10-07 12:00:31 -05:00
Joe Groff a13e75f4f4 don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86 2009-10-07 11:59:36 -05:00
Joe Groff 444624e79f fix x86 %unpack-vector insns 2009-10-06 20:38:51 -05:00
Joe Groff 2edccca0bb oops...PACKUSDW is sse4 only 2009-10-06 20:09:50 -05:00
Joe Groff 425ea05529 %float>integer-vector should truncate 2009-10-06 13:57:54 -05:00
Joe Groff 84ecb1266d add insns for vector pack, unpack, integer>float, and float>integer 2009-10-05 22:34:14 -05:00
Slava Pestov 931107397c compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb 2009-10-05 05:27:49 -05:00
Joe Groff dca9d3e535 add %merge-vector-head and %merge-vector-tail instructions to back vmerge 2009-10-03 21:48:53 -05:00
Joe Groff 335df20713 add intrinsics for v<=, v<, v=, v>, v>=, vunordered? 2009-10-03 11:29:34 -05:00
Joe Groff b1ec36a324 extend x86 %compare-vector to cover all comparison codes, sometimes stupidly for now 2009-10-02 23:19:56 -05:00
Joe Groff e2e75c6b3a add intrinsic for vnot/vbitnot 2009-10-02 20:04:28 -05:00
Joe Groff 9d424a1092 Merge branch 'master' of git://factorcode.org/git/factor
Conflicts:
	basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
Joe Groff 7b13fa4283 fold test-vector/branch sequences into a test-vector-branch instruction 2009-10-01 19:53:30 -05:00
Joe Groff 228ad950bb %test-vector instruction for vany?, vall?, vnone? 2009-10-01 15:35:38 -05:00
Joe Groff 94070c11aa %compare-vector instruction (only does v= for now) 2009-10-01 14:31:37 -05:00
Joe Groff 3ba79be651 Revert "add a %blend-vector intrinsic for v?"
This reverts commit 21e4b28b67.
2009-09-30 23:40:37 -05:00
Joe Groff 37a091a188 Merge branch 'master' of git://factorcode.org/git/factor 2009-09-30 23:04:04 -05:00
Joe Groff 21e4b28b67 add a %blend-vector intrinsic for v? 2009-09-30 23:03:59 -05:00
Slava Pestov 65421b111b math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements 2009-09-30 20:04:37 -05:00
Slava Pestov 8e201ca4b7 Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64 2009-09-30 05:00:36 -05:00
Slava Pestov 2b13245704 math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles 2009-09-29 04:48:11 -05:00
Slava Pestov a6e8277b2c math.vectors.simd: add vshuffle intrinsic 2009-09-28 23:12:13 -05:00
Slava Pestov db217295b0 Work in progress 2009-09-28 17:31:34 -05:00
Slava Pestov 49dba53760 cpu.x86: cleanups 2009-09-28 16:38:35 -05:00