Slava Pestov
daf8f0ebba
cpu.x86: fix regression: fsqrt intrinsic wasn't used
2009-09-28 02:27:55 -05:00
Slava Pestov
10c5fe5933
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
Slava Pestov
e8cfaccef0
compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
2009-09-27 20:36:05 -05:00
Slava Pestov
6dd8e4657e
Merge branch 'master' into more_aggressive_coalescing
2009-09-27 19:29:50 -05:00
Slava Pestov
6f2a4eba51
compiler.cfg.linear-scan: fix partial sync point logic in case where dst == src, and clean up spilling code
2009-09-27 19:28:20 -05:00
Slava Pestov
2efab6efad
cpu.x86.32: implement %unary-float-function and %binary-float-function; speeds up partial-sums and struct-arrays benchmarks
2009-09-27 18:06:30 -05:00
Slava Pestov
a267100781
compiler.cfg.ssa.destruction: more aggressive coalescing work in progress
2009-09-27 17:17:26 -05:00
sheeple
2b35f52ed2
Merge branch 'slots' of git://factorcode.org/git/factor into slots
...
Conflicts:
basis/cpu/x86/x86.factor
2009-09-26 03:12:42 -05:00
Daniel Ehrenberg
fb7f6ab455
Making ##slot and ##set-slot not have a temporary parameter
2009-09-26 00:28:14 -05:00
Phil Dawes
baa41f451f
removed param-reg-* HOOKs
2009-09-25 18:58:55 +01:00
Phil Dawes
aa71248937
made inline_gc a VM_C_API function
2009-09-25 18:29:07 +01:00
Phil Dawes
8b005f5b1d
make inline_gc regparm(3) and cleaned up %call-gc stack alignment
2009-09-24 21:45:56 +01:00
Slava Pestov
1b30310a35
cpu.x86: don't generate SSE2 instructions if only SSE1 is available
2009-09-24 04:07:15 -05:00
Slava Pestov
24039cb56a
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
Slava Pestov
3581d0b09b
cpu.x86/ppc: unify register-to-register moves using %copy so that better coalescing can eliminate more moves later
2009-09-23 22:49:54 -05:00
Slava Pestov
165496d2f2
Add longlong-2, ulonglong-2, longlong-4, ulonglong-4 SIMD types, fix int-4 multiplication on SSE2
2009-09-23 20:23:25 -05:00
Slava Pestov
abac963882
math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
2009-09-23 02:47:14 -05:00
Slava Pestov
e4872212b1
cpu.x86: fix using list
2009-09-20 23:24:30 -05:00
Slava Pestov
e04fba6bc7
Fix conflict
2009-09-20 23:18:07 -05:00
Slava Pestov
66871995c9
math.vectors.simd: add saturated arithmetic operations
2009-09-20 23:16:02 -05:00
Slava Pestov
78c949b9b7
math.vectors: add v+- word which is accelerated by SSE3
2009-09-20 17:43:16 -05:00
Slava Pestov
dfb43bd2ca
More integer SIMD work
...
- move generated vocab support from specialized-arrays to vocabs.generated
- add fuzz testing to math.vectors.simd
- add alien type support for integer SIMD vectors
- SIMD: parsing word generates a SIMD type, instead of pre-generating them all in math.vectors.simd
2009-09-20 16:48:17 -05:00
Slava Pestov
0d77efef29
cpu.x86: cleanup
2009-09-20 04:17:34 -05:00
Slava Pestov
fc5fe2bd2a
Merge Phil Dawes' VM work
2009-09-20 03:48:08 -05:00
Slava Pestov
ea2bcd69c7
math.vectors.simd: redesign to be more flexible, integer SIMD work in progress
2009-09-20 02:08:32 -05:00
Phil Dawes
f5e6d43e1e
separated vm-1st-arg and vm-3rd-arg asm invoke words (needed for ppc & x86.64)
2009-09-16 08:20:09 +01:00
Phil Dawes
6e5ddc0c33
vm pointer passed to nest_stacks and unnest_stacks (win32)
2009-09-16 08:17:26 +01:00
Phil Dawes
780415b159
added code to pass vm ptr to some unboxers
2009-09-16 08:16:32 +01:00
Phil Dawes
2a1a4ccf27
fixed up getenv compiler intrinsic to use vm struct userenv
2009-09-16 08:16:32 +01:00
Phil Dawes
cb3df86491
moved cards_offset and decks_offset into vm struct (for x86)
2009-09-16 08:16:31 +01:00
Phil Dawes
fd72e140d2
nursery global variable moved into vm
2009-09-16 08:16:31 +01:00
Phil Dawes
6da959ff3b
renamed to vm-field-offset. Slava's better at naming than me
2009-09-16 08:16:31 +01:00
Phil Dawes
77a13b1b6a
Added a vm C-STRUCT, using it for struct offsets in x86 asm
2009-09-16 08:16:31 +01:00
Phil Dawes
f9f1031dd8
moved stack_chain into vm struct
2009-09-16 08:16:31 +01:00
Phil Dawes
1fda8af73b
Added %vm-invoke to pass vm ptr to vm functions (x86.32 only, otherwise uses singleton vm)
2009-09-16 08:16:30 +01:00
Joe Groff
e5145b5a48
convert compiler cpu backends to use c-type words
2009-09-15 16:08:42 -05:00
Slava Pestov
19a5f58b53
cpu.x86: tweak SIMD intrinsics
2009-09-08 22:34:01 -05:00
Slava Pestov
092b31910d
compiler: separate ##save-context instruction from ##alien-invoke, generate a ##save-context for libm calls, and add a pass to combine multiple context saves within a basic block. Fixes crashes with FP traps thrown by libm functions on x86-32
2009-09-08 21:50:55 -05:00
Joe Groff
025a5b7b15
split unordered and ordered float comparison intrinsics in compiler; generate only unordered comparisons for now
2009-09-08 17:04:26 -05:00
Slava Pestov
ef09991500
Fixes
2009-09-08 00:13:18 -05:00
Slava Pestov
17821626c3
Fix conflicts
2009-09-07 23:51:25 -05:00
Joe Groff
9430fdc4b6
i had comisd/ucomisd backwards on x86
2009-09-04 12:30:30 -05:00
Slava Pestov
1f5193198b
compiler: clean up code generation for alien boxing/unboxing a bit
2009-09-03 21:22:43 -05:00
Joe Groff
b1ba82c84f
convert comparison branch code in compiler to use locals
2009-09-03 21:19:39 -05:00
Slava Pestov
20dfbf7ac8
More SIMD work
...
- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
Joe Groff
0b9e5c034a
add compiler comparison codes for floating-point unordered comparisons; update x86 backend to generate proper code for all floating-point comparisons
2009-09-03 20:32:05 -05:00
Slava Pestov
f811208271
Detect SSE version and enable the correct set of SIMD intrinsics
2009-09-03 03:28:38 -05:00
Slava Pestov
52b99c050e
Initial implementation of SSE vector intrinsics:
...
- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
Slava Pestov
775b9af2f7
compiler: eliminate boilerplate by centralizing info in declarative INSN: syntax
2009-09-02 06:22:37 -05:00
Slava Pestov
b35a01879e
%box-displaced-alien: fix clobberage found by Doug
2009-08-30 05:11:08 -05:00