Commit Graph

55 Commits (de0cc7f99a86e754a7d234d0d62263c678e610a3)

Author SHA1 Message Date
sheeple d1f248dac6 Fixing PowerPC backend: prolog register clobberage, spilling, and general stack frame usage. Add some lame tests for spilling 2008-11-06 19:00:56 -06:00
Slava Pestov 4e55cd973b If a #dispatch branch is a call to another word which is not an intrinsic, we avoid generating the dispatch branch and just jump to the word directly 2008-11-06 11:48:55 -06:00
Slava Pestov 64cbf619a9 Add more algebraic simplifications: comparison of a comparison, comparison where first is immediate 2008-11-06 09:27:52 -06:00
Slava Pestov 1c1333fbe9 Compile not and >boolean as branchless intrinsics by having the CFG builder detect certain code patterns 2008-11-06 09:09:21 -06:00
sheeple d2ec46e38f PowerPC backend almost functional; some new compiler unit tests added,
better compilation of 'f eq?'; f becomes an immediate operand
move aux-offset to compiler.constants
2008-11-06 06:27:27 -06:00
Slava Pestov 53cd75b06c Add string-nth intrinsic 2008-11-06 01:11:28 -06:00
Slava Pestov cc879fa9b7 Tuple layouts are now arrays, instead of built-in types. The superclass
array is now part of the tuple layout object itself, and class hashcodes
are stored alongside class words there. This removes 2 indirections when
reading a superclass, and 3 when reading a superclass hashcode.
2008-11-05 22:20:29 -06:00
Slava Pestov c8521ad826 Add tool to dump live intervals 2008-11-04 17:23:20 -06:00
Slava Pestov 1af3b8ed65 If a register is spilled and the reload location is also a copy, we chicken out and don't coalesce. This is suboptimal but it's not clear to me how to implement it cleanly, and SSA graph coloring will solve this problem eventually anyway 2008-11-04 00:32:56 -06:00
Slava Pestov efcb916e35 Handle a jump to a jump by cloning the block, in the same way we optimize jumps to returns 2008-11-03 21:02:34 -06:00
Slava Pestov 82e9eedd39 Forgot about float= intrinsic 2008-11-03 07:15:09 -06:00
Slava Pestov 59f4f25b91 Loop alignment: appears to be a small win for reverse-complement 2008-11-03 06:20:51 -06:00
Slava Pestov 0250d7c1d2 Forgot a drop in unit test 2008-11-03 01:53:27 -06:00
Slava Pestov 08b277e892 Fix alias anlaysis bug: result of ##box-alien and ##box-float did not get an AC, so calling hi-tag would not compile 2008-11-03 01:52:55 -06:00
Slava Pestov f253e74942 Inline subprimitives in optimizing compiler 2008-11-03 01:18:54 -06:00
Slava Pestov 445e353337 Optimize away useless jumps 2008-11-02 23:09:31 -06:00
Slava Pestov d11a779fdd RicE 2008-11-02 03:58:32 -06:00
Slava Pestov 3834eaeb05 Don't generate GC checks if the allocation instruction is optimized out 2008-11-02 01:50:48 -06:00
Slava Pestov 8df1aba71d Coalescing 2008-11-02 01:49:57 -06:00
Slava Pestov 804c6f93ea Fix x86.32 2008-10-31 21:07:41 -05:00
Slava Pestov db4db19cd9 Start working on coalescing 2008-10-28 02:38:37 -07:00
Slava Pestov 492a15e345 Move insn class to compiler.cfg.instructions 2008-10-24 09:17:06 -05:00
Slava Pestov 885adc8dc9 Various improvements 2008-10-23 05:27:54 -05:00
Slava Pestov 52967c5bf1 Improved value numbering 2008-10-23 02:49:26 -05:00
Slava Pestov d723b69990 Value numbering 2008-10-22 21:59:07 -05:00
Slava Pestov 084e64d0bc Tweak inheritance 2008-10-22 21:58:46 -05:00
Slava Pestov ba0ed21e1d Better error message 2008-10-22 21:58:37 -05:00
Slava Pestov 9a07760542 CFG optimizer 2008-10-22 18:41:37 -05:00
Slava Pestov 3711aa3bca Stack height normalization 2008-10-22 18:41:26 -05:00
Slava Pestov 6d812aaa52 Write barrier elimination 2008-10-22 18:41:10 -05:00
Slava Pestov 1f693b50b3 Massive focused action 2008-10-22 18:39:41 -05:00
Slava Pestov 73d01452cb Replace ##gc with a gc flag in the basic block 2008-10-22 18:38:30 -05:00
Slava Pestov f09813f6fd Alias analysis 2008-10-22 18:37:47 -05:00
Slava Pestov 1b06ab1b39 Fixing various bugs 2008-10-21 23:17:32 -05:00
Slava Pestov 94a2bfa2ea Working on comparison operations, clearing out remaining dead wood 2008-10-21 03:20:48 -05:00
Slava Pestov df498c21a3 Trim USING: 2008-10-20 20:46:47 -05:00
Slava Pestov e92f795a76 More work on intrinsics; memory allocation and slot access now expands correctly 2008-10-20 20:40:15 -05:00
Slava Pestov 37cf7d9a9c Add SSA comparison instructions, fix various problems 2008-10-20 05:55:20 -05:00
Slava Pestov f092622fac CFG IR is now pure SSA 2008-10-20 01:56:28 -05:00
Slava Pestov 14d8696f40 Oops, don't mix register classes in active set 2008-10-19 03:34:42 -05:00
Slava Pestov c0d89b061e Fixing register allocator prspilling 2008-10-19 01:10:21 -05:00
Slava Pestov 627dfd1ff5 Finish vreg simplification 2008-10-17 20:03:59 -05:00
Slava Pestov 239578353f Simplifying vregs work in progress 2008-10-17 15:35:04 -05:00
Slava Pestov ae3c4ae1b6 Fix some problems with callbacks 2008-10-12 23:32:14 -05:00
Slava Pestov 749c77d6b1 Fix linear scan test 2008-10-12 18:40:10 -05:00
Slava Pestov b2ade7f556 Fix callbacks and non-tailcalls to dispatch 2008-10-12 17:37:26 -05:00
Slava Pestov 5f93ab74e4 Fix #dispatch generation 2008-10-12 16:46:59 -05:00
Slava Pestov 68c9b22cef Don't need known-tag templates any more 2008-10-11 14:08:00 -05:00
Slava Pestov f979ae5b82 Expand slot accessors further to avoid having to use complex template decision 2008-10-11 14:05:15 -05:00
Slava Pestov 3844cb62d8 Fix %write-barrier 2008-10-10 03:16:26 -05:00