f102bd7ded
cpu.x86: update %box-displaced-alien for introduction of address field
2009-11-03 03:17:43 -06:00
bc45ceb05b
Merge branch 'master' into new_gc
2009-11-02 20:34:13 -06:00
6b1f651208
compiler.cfg.intrinsics: uncomment line commented out by mistake
2009-11-02 20:33:14 -06:00
f1479e800b
Merge branch 'master' into new_gc
2009-11-02 20:11:43 -06:00
bb202805d8
compiler.cfg: don't generate useless methods in instruction meta-programming. reduces bootstrap time
2009-11-02 20:11:29 -06:00
6299c42564
Minor bug fixes for 4-bit tags
2009-11-02 17:41:36 -06:00
d65296b334
vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
2009-11-02 04:25:54 -06:00
ca8d4c15f4
add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
2009-10-30 00:41:19 -05:00
22a9be5ea5
update existing code to use :> ( ) when possible
2009-10-28 16:11:33 -05:00
33f373162d
fix load errors from bootstrapping
2009-10-28 12:51:03 -05:00
8b6665c57e
update existing code for [let change
2009-10-27 22:05:37 -05:00
a2976083be
generate unsigned vector comparison fallbacks using min/max or xor/signed compare
2009-10-20 22:30:57 -05:00
a0a816e88a
generate better fallback code for vmin/vmax intrinsics
2009-10-20 19:22:38 -05:00
0a3029d9f2
compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure
2009-10-19 04:58:29 -05:00
bff46b80a8
fix unsigned vector unpack
2009-10-16 14:25:33 -05:00
22e79e8495
compiler: tweak ##write-barrier-imm
2009-10-15 02:40:23 -05:00
10ad5cad53
Working on adding support for the new write barrier to optimized code
2009-10-14 02:06:01 -05:00
2577ab83a6
only emit ##alien-vector/##set-alien-vector insns if the rep is available
2009-10-10 12:53:10 -05:00
61befc8bb1
have vshuffle accept simd-128 variable byte shuffles
2009-10-10 11:30:11 -05:00
5158a12d32
rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
2009-10-09 21:26:27 -05:00
2bfcd7ed81
generate better code for vabs when instruction isn't available instead of using software fallback (-0.0 andn for floats, x > 0 ? x : -x for signed ints, nop for unsigned ints)
2009-10-09 14:24:55 -05:00
4972fbcbc9
implement vneg as an intrinsic in terms of load -0, subtract
2009-10-09 13:16:39 -05:00
98836a9e2e
break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
2009-10-07 15:27:03 -05:00
43b51ef2eb
decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
2009-10-07 14:09:46 -05:00
a13e75f4f4
don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
2009-10-07 11:59:36 -05:00
96cb1d5038
glue conversion intrinsics to instructions
2009-10-06 20:13:38 -05:00
3e44e0bb02
rename SIMD vmerge and kids to (vmerge), make new vmerge more generally useful
2009-10-05 17:55:39 -05:00
931107397c
compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
2009-10-05 05:27:49 -05:00
dca9d3e535
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
335df20713
add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
2009-10-03 11:29:34 -05:00
e2e75c6b3a
add intrinsic for vnot/vbitnot
2009-10-02 20:04:28 -05:00
e153d544eb
implement vand, vor, vandn, and vxor as bitwise intrinsics for simd types
2009-10-02 14:17:01 -05:00
9d424a1092
Merge branch 'master' of git://factorcode.org/git/factor
...
Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
228ad950bb
%test-vector instruction for vany?, vall?, vnone?
2009-10-01 15:35:38 -05:00
94070c11aa
%compare-vector instruction (only does v= for now)
2009-10-01 14:31:37 -05:00
3ba79be651
Revert "add a %blend-vector intrinsic for v?"
...
This reverts commit 21e4b28b67
2009-09-30 23:40:37 -05:00
37a091a188
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-30 23:04:04 -05:00
21e4b28b67
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
65421b111b
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
8e201ca4b7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
1c8662ce4a
math.vectors.simd: add vbroadcast intrinsic, fix integer overflow issues
2009-09-29 22:58:20 -05:00
2b13245704
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
a6e8277b2c
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
db217295b0
Work in progress
2009-09-28 17:31:34 -05:00
10c5fe5933
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
e8cfaccef0
compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
2009-09-27 20:36:05 -05:00
2b35f52ed2
Merge branch 'slots' of git://factorcode.org/git/factor into slots
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Conflicts:
basis/cpu/x86/x86.factor
2009-09-26 03:12:42 -05:00
364332bd70
Completing slot and set-slot changes on x86
2009-09-26 01:39:48 -05:00
fb7f6ab455
Making ##slot and ##set-slot not have a temporary parameter
2009-09-26 00:28:14 -05:00
e5b94b11d7
Some fixes and cleanups in math.vectors
...
- Tighten up type inference for operations on complex float arrays
- Fix v. to have correct behavior with complex numbers
- Rename v<< and v>> to vlshift and vrshift to avoid clashing with v>> accessor
2009-09-24 06:58:33 -05:00
Slava Pestov
Joe Groff
Slava Pestov
sheeple
Daniel Ehrenberg