93 lines
2.5 KiB
Factor
93 lines
2.5 KiB
Factor
USING: accessors compiler.cfg compiler.cfg.linear-scan.allocation
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compiler.cfg.linear-scan.allocation.state
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compiler.cfg.linear-scan.live-intervals cpu.architecture
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cpu.x86.assembler.operands heaps kernel namespaces system tools.test ;
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IN: compiler.cfg.linear-scan.allocation.tests
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: unassigned-interval ( -- live-interval )
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T{ live-interval-state
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{ vreg 49 }
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{ start 30 } { end 46 }
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{ ranges { T{ live-range { from 30 } { to 46 } } } }
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{ uses
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{
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T{ vreg-use { n 30 } { def-rep double-rep } }
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T{ vreg-use { n 46 } { use-rep double-rep } }
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}
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}
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{ reg-class int-regs }
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} clone ;
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cpu x86.64? [
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! assign-registers
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{ RCX } [
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{ { int-regs V{ } } { float-regs V{ } } } active-intervals set
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unassigned-interval dup machine-registers assign-register reg>>
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] unit-test
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! register-status
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{ { RCX 1/0. } } [
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{ { int-regs V{ } } { float-regs V{ } } } active-intervals set
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unassigned-interval machine-registers register-status
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] unit-test
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] when
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! handle-sync-point
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{ } [
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T{ sync-point { n 30 } } { } handle-sync-point
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] unit-test
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: test-active-intervals ( -- assoc )
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{
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{ int-regs V{
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T{ live-interval-state
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{ vreg 1 }
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{ start 30 }
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{ end 40 }
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{ ranges
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{ T{ live-range { from 30 } { to 40 } } }
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}
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{ uses
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{ T{ vreg-use { n 32 } { def-rep double-rep } } }
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}
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}
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T{ live-interval-state
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{ vreg 50 }
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{ start 5 }
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{ end 10 }
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{ ranges
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{ T{ live-range { from 5 } { to 10 } } }
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}
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{ uses
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{ T{ vreg-use { n 8 } { def-rep double-rep } } }
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}
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}
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} }
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{ float-regs V{ } }
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} ;
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! Why are they both spilled?
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{
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{ { int-regs V{ } } { float-regs V{ } } }
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} [
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f f <basic-block> <cfg> cfg set
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H{ } clone spill-slots set
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V{ } clone handled-intervals set
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100 progress set
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T{ sync-point { n 35 } } test-active-intervals
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[ handle-sync-point ] keep
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] unit-test
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! spill-at-sync-point
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{ f } [
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<min-heap> unhandled-min-heap set
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f f <basic-block> <cfg> cfg set
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40 progress set
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T{ sync-point { n 40 } } unassigned-interval spill-at-sync-point
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] unit-test
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! spill-at-sync-point?
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{ t } [
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T{ sync-point { n 15 } } f spill-at-sync-point?
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] unit-test
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