92 lines
2.5 KiB
Factor
92 lines
2.5 KiB
Factor
USING: accessors arrays compiler.cfg compiler.cfg.instructions
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compiler.cfg.linear-scan.allocation.state compiler.cfg.linear-scan.assignment
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compiler.cfg.linear-scan.live-intervals compiler.cfg.registers
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compiler.cfg.ssa.destruction.leaders compiler.cfg.utilities cpu.architecture
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cpu.x86.assembler.operands grouping heaps kernel make namespaces random
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sequences sorting tools.test ;
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IN: compiler.cfg.linear-scan.assignment.tests
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! assign-insn-defs
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{
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T{ ##peek { dst RAX } { loc T{ ds-loc } } { insn# 0 } }
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} [
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H{ { 37 RAX } } pending-interval-assoc set
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H{ { 37 int-rep } } representations set
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H{ { 37 37 } } leader-map set
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T{ ##peek f 37 D: 0 0 } [ assign-insn-defs ] keep
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] unit-test
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! assign-registers
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{ } [
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V{ T{ ##inc { loc D: 3 } { insn# 7 } } } 0 insns>block block>cfg { }
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assign-registers
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] unit-test
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! assign-registers-in-block
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{
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V{ T{ ##inc { loc T{ ds-loc { n 3 } } } { insn# 7 } } }
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} [
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{ } init-assignment
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V{ T{ ##inc { loc D: 3 } { insn# 7 } } } 0 insns>block
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[ assign-registers-in-block ] keep instructions>>
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] unit-test
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! insert-reload
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{
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{ T{ ##reload { dst RAX } { rep int-rep } { src T{ spill-slot } } } }
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} [
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[
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T{ live-interval-state
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{ reg RAX }
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{ reload-from T{ spill-slot } }
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{ reload-rep int-rep }
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} insert-reload
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] { } make
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] unit-test
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! insert-spill
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{ { T{ ##spill { src RAX } } } } [
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[
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T{ live-interval-state { vreg 1234 } { reg RAX } } insert-spill
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] { } make
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] unit-test
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{ V{ T{ ##spill { src RAX } { rep int-rep } } } } [
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[
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1234 int-regs <live-interval>
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RAX >>reg int-rep >>spill-rep
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insert-spill
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] V{ } make
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] unit-test
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! vreg>reg
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{ T{ spill-slot f 16 } } [
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H{ { 45 double-2-rep } } representations set
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H{ { 45 45 } } leader-map set
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H{ { { 45 16 } T{ spill-slot { n 16 } } } } spill-slots set
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45 vreg>reg
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] unit-test
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[
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! It gets very strange if the leader of a vreg has a different
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! sized representation than the vreg being led.
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H{
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{ 45 double-2-rep }
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{ 46 double-rep }
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} representations set
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H{ { 45 45 } { 46 45 } } leader-map set
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H{ { { 45 16 } T{ spill-slot { n 16 } } } } spill-slots set
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46 vreg>reg
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] [ bad-vreg? ] must-fail-with
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{ { 3 56 } } [
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{ { 3 7 } { -1 56 } { -1 3 } } >min-heap [ -1 = ] heap-pop-while
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natural-sort
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] unit-test
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{ 3 } [
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{ 50 90 95 120 } [ 25 int-regs <live-interval> 2array ] map >min-heap
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pending-interval-heap set 90 expire-old-intervals
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pending-interval-heap get heap-size
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] unit-test
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