819 lines
		
	
	
		
			22 KiB
		
	
	
	
		
			Factor
		
	
	
			
		
		
	
	
			819 lines
		
	
	
		
			22 KiB
		
	
	
	
		
			Factor
		
	
	
| ! Copyright (C) 2011 Erik Charlebois
 | |
| ! See http://factorcode.org/license.txt for BSD license.
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| USING: bootstrap.image.private kernel kernel.private namespaces
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| system cpu.ppc.assembler compiler.units compiler.constants math
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| math.private math.ranges layouts words vocabs slots.private
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| locals locals.backend generic.single.private fry sequences
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| threads.private strings.private ;
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| FROM: cpu.ppc.assembler => B ;
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| IN: bootstrap.ppc
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| 
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| : jit-call ( string -- )
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|     dup
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|     0 swap jit-load-dlsym
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|     0 MTLR
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|     jit-load-dlsym-toc
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|     BLRL ;
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| 
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| : jit-call-quot ( -- )
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|     4 quot-entry-point-offset LI
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|     4 3 4 jit-load-cell-x
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|     4 MTLR
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|     BLRL ;
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| 
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| : jit-jump-quot ( -- )
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|     4 quot-entry-point-offset LI
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|     4 3 4 jit-load-cell-x
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|     4 MTCTR
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|     BCTR ;
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| 
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| : stack-frame ( -- n )
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|     reserved-size factor-area-size + 16 align ;
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| 
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| : save-at ( m -- n ) reserved-size + param-size + ;
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| 
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| : save-int ( reg off -- ) [ 1 ] dip save-at jit-save-int ;
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| : save-fp  ( reg off -- ) [ 1 ] dip save-at STFD ;
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| : save-vec ( reg offt -- ) save-at 11 swap LI 11 1 STVXL ;
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| : restore-int ( reg off -- ) [ 1 ] dip save-at jit-load-int ;
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| : restore-fp  ( reg off -- ) [ 1 ] dip save-at LFD ;
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| : restore-vec ( reg offt -- ) save-at 11 swap LI 11 1 LVXL ;
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| 
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| ! Stop using intervals here.
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| : nv-fp-regs  ( -- seq ) 14 31 [a,b] ;
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| : nv-vec-regs ( -- seq ) 20 31 [a,b] ;
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| 
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| : saved-fp-regs-size  ( -- n ) 144 ;
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| : saved-vec-regs-size ( -- n ) 192 ;
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| 
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| : callback-frame-size ( -- n )
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|     reserved-size
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|     param-size +
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|     saved-int-regs-size +
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|     saved-fp-regs-size +
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|     saved-vec-regs-size +
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|     16 align ;
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| 
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| : old-context-save-offset ( -- n )
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|     cell-size 20 * saved-fp-regs-size + saved-vec-regs-size + save-at ;
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| 
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| [
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|     ! Save old stack pointer
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|     11 1 MR
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| 
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|     0 MFLR                                           ! Get return address
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|     0 1 lr-save jit-save-cell                        ! Stash return address
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|     1 1 callback-frame-size neg jit-save-cell-update ! Bump stack pointer and set back chain
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| 
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|     ! Save all non-volatile registers
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|     nv-int-regs [ cell-size * save-int ] each-index
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|     nv-fp-regs [ 8 * saved-int-regs-size + save-fp  ] each-index
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|     ! nv-vec-regs [ 16 * saved-int-regs-size saved-fp-regs-size + + save-vec ] each-index
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| 
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|     ! Stick old stack pointer in the frame register so callbacks
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|     ! can access their arguments
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|     frame-reg 11 MR
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| 
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|     ! Load VM into vm-reg
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|     vm-reg jit-load-vm-arg
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| 
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|     ! Save old context
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|     0 vm-reg vm-context-offset jit-load-cell
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|     0 1 old-context-save-offset jit-save-cell
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| 
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|     ! Switch over to the spare context
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|     11 vm-reg vm-spare-context-offset jit-load-cell
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|     11 vm-reg vm-context-offset jit-save-cell
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| 
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|     ! Save C callstack pointer and load Factor callstack
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|     1 11 context-callstack-save-offset jit-save-cell
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|     1 11 context-callstack-bottom-offset jit-load-cell
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| 
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|     ! Load new data and retain stacks
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|     rs-reg 11 context-retainstack-offset jit-load-cell
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|     ds-reg 11 context-datastack-offset jit-load-cell
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| 
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|     ! Call into Factor code
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|     0 jit-load-entry-point-arg
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|     0 MTLR
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|     BLRL
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| 
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|     ! Load VM again, pointlessly
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|     vm-reg jit-load-vm-arg
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| 
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|     ! Load C callstack pointer
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|     11 vm-reg vm-context-offset jit-load-cell
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|     1 11 context-callstack-save-offset jit-load-cell
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| 
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|     ! Load old context
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|     0 1 old-context-save-offset jit-load-cell
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|     0 vm-reg vm-context-offset jit-save-cell
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| 
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|     ! Restore non-volatile registers
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|     ! nv-vec-regs [ 16 * saved-int-regs-size saved-float-regs-size + + restore-vec ] each-index
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|     nv-fp-regs [ 8 * saved-int-regs-size + restore-fp ] each-index
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|     nv-int-regs [ cell-size * restore-int ] each-index
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| 
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|     1 1 callback-frame-size ADDI ! Bump stack back up
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|     0 1 lr-save jit-load-cell    ! Fetch return address
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|     0 MTLR                       ! Set up return
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|     BLR                          ! Branch back
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| ] CALLBACK-STUB jit-define
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| 
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| : jit-conditional* ( test-quot false-quot -- )
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|     [ '[ 4 + @ ] ] dip jit-conditional ; inline
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| 
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| : jit-load-context ( -- )
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|     ctx-reg vm-reg vm-context-offset jit-load-cell ;
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| 
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| : jit-save-context ( -- )
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|     jit-load-context
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|     1 ctx-reg context-callstack-top-offset jit-save-cell
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|     ds-reg ctx-reg context-datastack-offset jit-save-cell
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|     rs-reg ctx-reg context-retainstack-offset jit-save-cell ;
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| 
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| : jit-restore-context ( -- )
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|     ds-reg ctx-reg context-datastack-offset jit-load-cell
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|     rs-reg ctx-reg context-retainstack-offset jit-load-cell ;
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| 
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| [
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|     0 MFLR
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|     0 1 lr-save jit-save-cell
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|     0 jit-load-this-arg
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|     0 1 cell-size 2 * neg jit-save-cell
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|     0 stack-frame LI
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|     0 1 cell-size 1 * neg jit-save-cell
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|     1 1 stack-frame neg jit-save-cell-update
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| ] JIT-PROLOG jit-define
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| 
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| [
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|     3 jit-load-literal-arg
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|     3 ds-reg cell-size jit-save-cell-update
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| ] JIT-PUSH-LITERAL jit-define
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| 
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| [
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|     jit-save-context
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|     3 vm-reg MR
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|     4 jit-load-dlsym-arg
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|     4 MTLR
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|     jit-load-dlsym-toc-arg ! Restore the TOC/GOT
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|     BLRL
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|     jit-restore-context
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| ] JIT-PRIMITIVE jit-define
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| 
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| [
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|     0 BL rc-relative-ppc-3-pc rt-entry-point-pic jit-rel
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| ] JIT-WORD-CALL jit-define
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| 
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| [
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|     6 jit-load-here-arg
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|     0 B rc-relative-ppc-3-pc rt-entry-point-pic-tail jit-rel
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| ] JIT-WORD-JUMP jit-define
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| 
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| [
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|     3 ds-reg 0 jit-load-cell
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|     ds-reg dup cell-size SUBI
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|     0 3 \ f type-number jit-compare-cell-imm
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|     [ 0 swap BEQ ] [ 0 B rc-relative-ppc-3-pc rt-entry-point jit-rel ] jit-conditional*
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|     0 B rc-relative-ppc-3-pc rt-entry-point jit-rel
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| ] JIT-IF jit-define
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| 
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| : jit->r ( -- )
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|     4 ds-reg 0 jit-load-cell
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|     ds-reg dup cell-size SUBI
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|     4 rs-reg cell-size jit-save-cell-update ;
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| 
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| : jit-2>r ( -- )
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|     4 ds-reg 0 jit-load-cell
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|     5 ds-reg cell-size neg jit-load-cell
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|     ds-reg dup 2 cell-size * SUBI
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|     rs-reg dup 2 cell-size * ADDI
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|     4 rs-reg 0 jit-save-cell
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|     5 rs-reg cell-size neg jit-save-cell ;
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| 
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| : jit-3>r ( -- )
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|     4 ds-reg 0 jit-load-cell
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|     5 ds-reg cell-size neg jit-load-cell
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|     6 ds-reg cell-size neg 2 * jit-load-cell
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|     ds-reg dup 3 cell-size * SUBI
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|     rs-reg dup 3 cell-size * ADDI
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|     4 rs-reg 0 jit-save-cell
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|     5 rs-reg cell-size neg jit-save-cell
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|     6 rs-reg cell-size neg 2 * jit-save-cell ;
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| 
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| : jit-r> ( -- )
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|     4 rs-reg 0 jit-load-cell
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|     rs-reg dup cell-size SUBI
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|     4 ds-reg cell-size jit-save-cell-update ;
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| 
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| : jit-2r> ( -- )
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|     4 rs-reg 0 jit-load-cell
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|     5 rs-reg cell-size neg jit-load-cell
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|     rs-reg dup 2 cell-size * SUBI
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|     ds-reg dup 2 cell-size * ADDI
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|     4 ds-reg 0 jit-save-cell
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|     5 ds-reg cell-size neg jit-save-cell ;
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| 
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| : jit-3r> ( -- )
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|     4 rs-reg 0 jit-load-cell
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|     5 rs-reg cell-size neg jit-load-cell
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|     6 rs-reg cell-size neg 2 * jit-load-cell
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|     rs-reg dup 3 cell-size * SUBI
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|     ds-reg dup 3 cell-size * ADDI
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|     4 ds-reg 0 jit-save-cell
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|     5 ds-reg cell-size neg jit-save-cell
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|     6 ds-reg cell-size neg 2 * jit-save-cell ;
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| 
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| [
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|     jit->r
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|     0 BL rc-relative-ppc-3-pc rt-entry-point jit-rel
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|     jit-r>
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| ] JIT-DIP jit-define
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| 
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| [
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|     jit-2>r
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|     0 BL rc-relative-ppc-3-pc rt-entry-point jit-rel
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|     jit-2r>
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| ] JIT-2DIP jit-define
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| 
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| [
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|     jit-3>r
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|     0 BL rc-relative-ppc-3-pc rt-entry-point jit-rel
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|     jit-3r>
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| ] JIT-3DIP jit-define
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| 
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| [
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|     1 1 stack-frame ADDI
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|     0 1 lr-save jit-load-cell
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|     0 MTLR
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| ] JIT-EPILOG jit-define
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| 
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| [ BLR ] JIT-RETURN jit-define
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| 
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| ! ! ! Polymorphic inline caches
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| 
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| ! Don't touch r6 here; it's used to pass the tail call site
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| ! address for tail PICs
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| 
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| ! Load a value from a stack position
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| [
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|     4 ds-reg 0 jit-load-cell rc-absolute-ppc-2 rt-untagged jit-rel
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| ] PIC-LOAD jit-define
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| 
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| [ 4 4 tag-mask get ANDI. ] PIC-TAG jit-define
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| 
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| [
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|     3 4 MR
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|     4 4 tag-mask get ANDI.
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|     0 4 tuple type-number jit-compare-cell-imm
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|     [ 0 swap BNE ]
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|     [ 4 tuple-class-offset LI 4 3 4 jit-load-cell-x ]
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|     jit-conditional*
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| ] PIC-TUPLE jit-define
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| 
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| [
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|     0 4 0 jit-compare-cell-imm rc-absolute-ppc-2 rt-untagged jit-rel
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| ] PIC-CHECK-TAG jit-define
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| 
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| [
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|     5 jit-load-literal-arg
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|     0 4 5 jit-compare-cell
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| ] PIC-CHECK-TUPLE jit-define
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| 
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| [
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|     [ 0 swap BNE ] [ 0 B rc-relative-ppc-3-pc rt-entry-point jit-rel ] jit-conditional*
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| ] PIC-HIT jit-define
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| 
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| ! Inline cache miss entry points
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| : jit-load-return-address ( -- ) 6 MFLR ;
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| 
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| ! These are always in tail position with an existing stack
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| ! frame, and the stack. The frame setup takes this into account.
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| : jit-inline-cache-miss ( -- )
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|     jit-save-context
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|     3 6 MR
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|     4 vm-reg MR
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|     ctx-reg 6 MR
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|     "inline_cache_miss" jit-call
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|     6 ctx-reg MR
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|     jit-load-context
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|     jit-restore-context ;
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| 
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| [ jit-load-return-address jit-inline-cache-miss ]
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| [ 3 MTLR BLRL ]
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| [ 3 MTCTR BCTR ]
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| \ inline-cache-miss define-combinator-primitive
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| 
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| [ jit-inline-cache-miss ]
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| [ 3 MTLR BLRL ]
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| [ 3 MTCTR BCTR ]
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| \ inline-cache-miss-tail define-combinator-primitive
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| 
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| ! ! ! Megamorphic caches
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| 
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| [
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|     ! class = ...
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|     3 4 MR
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|     4 4 tag-mask get ANDI. ! Mask and...
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|     4 4 tag-bits get jit-shift-left-logical-imm ! shift tag bits to fixnum
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|     0 4 tuple type-number tag-fixnum jit-compare-cell-imm
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|     [ 0 swap BNE ]
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|     [ 4 tuple-class-offset LI 4 3 4 jit-load-cell-x ]
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|     jit-conditional*
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|     ! cache = ...
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|     3 jit-load-literal-arg
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|     ! key = hashcode(class)
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|     5 4 jit-class-hashcode
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|     ! key &= cache.length - 1
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|     5 5 mega-cache-size get 1 - 4 * ANDI.
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|     ! cache += array-start-offset
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|     3 3 array-start-offset ADDI
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|     ! cache += key
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|     3 3 5 ADD
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|     ! if(get(cache) == class)
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|     6 3 0 jit-load-cell
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|     0 6 4 jit-compare-cell
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|     [ 0 swap BNE ]
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|     [
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|         ! megamorphic_cache_hits++
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|         4 jit-load-megamorphic-cache-arg
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|         5 4 0 jit-load-cell
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|         5 5 1 ADDI
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|         5 4 0 jit-save-cell
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|         ! ... goto get(cache + cell-size)
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|         5 word-entry-point-offset LI
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|         3 3 cell-size jit-load-cell
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|         3 3 5 jit-load-cell-x
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|         3 MTCTR
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|         BCTR
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|     ]
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|     jit-conditional*
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|     ! fall-through on miss
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| ] MEGA-LOOKUP jit-define
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| 
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| ! ! ! Sub-primitives
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| 
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| ! Quotations and words
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| [
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|     3 ds-reg 0 jit-load-cell
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|     ds-reg dup cell-size SUBI
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| ]
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| [ jit-call-quot ]
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| [ jit-jump-quot ] \ (call) define-combinator-primitive
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| 
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| [
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|     3 ds-reg 0 jit-load-cell
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|     ds-reg dup cell-size SUBI
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|     4 word-entry-point-offset LI
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|     4 3 4 jit-load-cell-x
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| ]
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| [ 4 MTLR BLRL ]
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| [ 4 MTCTR BCTR ] \ (execute) define-combinator-primitive
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| 
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| [
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|     3 ds-reg 0 jit-load-cell
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|     ds-reg dup cell-size SUBI
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|     4 word-entry-point-offset LI
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|     4 3 4 jit-load-cell-x
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|     4 MTCTR BCTR
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| ] JIT-EXECUTE jit-define
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| 
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| [
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|     jit-save-context
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|     4 vm-reg MR
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|     "lazy_jit_compile" jit-call
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| ]
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| [ jit-call-quot ]
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| [ jit-jump-quot ]
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| \ lazy-jit-compile define-combinator-primitive
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| 
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| ! Comparisons
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| : jit-compare ( insn -- )
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|     t jit-literal
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|     3 jit-load-literal-arg
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|     4 ds-reg 0 jit-load-cell
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|     5 ds-reg cell-size neg jit-load-cell-update
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|     0 5 4 jit-compare-cell
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|     [ 0 8 ] dip execute( cr offset -- )
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|     3 \ f type-number LI
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|     3 ds-reg 0 jit-save-cell ;
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| 
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| : jit-math ( insn -- )
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|     3 ds-reg 0 jit-load-cell
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|     4 ds-reg cell-size neg jit-load-cell-update
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|     [ 5 3 4 ] dip execute( dst src1 src2 -- )
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|     5 ds-reg 0 jit-save-cell ;
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| 
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| ! Overflowing fixnum arithmetic
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| :: jit-overflow ( insn func -- )
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|     ds-reg ds-reg cell-size SUBI
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|     jit-save-context
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|     3 ds-reg 0 jit-load-cell
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|     4 ds-reg cell-size jit-load-cell
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|     0 0 LI
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|     0 MTXER
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|     6 4 3 insn call( d a s -- )
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|     6 ds-reg 0 jit-save-cell
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|     [ 0 swap BNS ]
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|     [
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|         5 vm-reg MR
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|         func jit-call
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|     ]
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|     jit-conditional* ;
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| 
 | |
| ! Contexts
 | |
| :: jit-switch-context ( reg -- )
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|     7 0 LI
 | |
|     7 1 lr-save jit-save-cell
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| 
 | |
|     ! Make the new context the current one
 | |
|     ctx-reg reg MR
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|     ctx-reg vm-reg vm-context-offset jit-save-cell
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| 
 | |
|     ! Load new stack pointer
 | |
|     1 ctx-reg context-callstack-top-offset jit-load-cell
 | |
| 
 | |
|     ! Load new ds, rs registers
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|     jit-restore-context ;
 | |
| 
 | |
| : jit-pop-context-and-param ( -- )
 | |
|     3 ds-reg 0 jit-load-cell
 | |
|     4 alien-offset LI
 | |
|     3 3 4 jit-load-cell-x
 | |
|     4 ds-reg cell-size neg jit-load-cell
 | |
|     ds-reg ds-reg cell-size 2 * SUBI ;
 | |
| 
 | |
| : jit-push-param ( -- )
 | |
|     ds-reg ds-reg cell-size ADDI
 | |
|     4 ds-reg 0 jit-save-cell ;
 | |
| 
 | |
| : jit-set-context ( -- )
 | |
|     jit-pop-context-and-param
 | |
|     jit-save-context
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|     3 jit-switch-context
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|     jit-push-param ;
 | |
| 
 | |
| : jit-pop-quot-and-param ( -- )
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|     3 ds-reg 0 jit-load-cell
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|     4 ds-reg cell-size neg jit-load-cell
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|     ds-reg ds-reg cell-size 2 * SUBI ;
 | |
| 
 | |
| : jit-start-context ( -- )
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|     ! Create the new context in return-reg. Have to save context
 | |
|     ! twice, first before calling new_context() which may GC,
 | |
|     ! and again after popping the two parameters from the stack.
 | |
|     jit-save-context
 | |
|     3 vm-reg MR
 | |
|     "new_context" jit-call
 | |
| 
 | |
|     6 3 MR
 | |
|     jit-pop-quot-and-param
 | |
|     jit-save-context
 | |
|     6 jit-switch-context
 | |
|     jit-push-param
 | |
|     jit-jump-quot ;
 | |
| 
 | |
| : jit-delete-current-context ( -- )
 | |
|     jit-load-context
 | |
|     3 vm-reg MR
 | |
|     "delete_context" jit-call ;
 | |
| 
 | |
| : jit-start-context-and-delete ( -- )
 | |
|     jit-save-context
 | |
| 
 | |
|     3 vm-reg MR
 | |
|     "reset_context" jit-call
 | |
| 
 | |
|     ctx-reg jit-switch-context
 | |
| 
 | |
|     ! Pops the quotation from the stack and puts it in register 3
 | |
|     3 ds-reg 0 jit-load-cell
 | |
|     ds-reg ds-reg cell-size SUBI
 | |
|     jit-jump-quot ;
 | |
| 
 | |
| ! # All ppc subprimitives
 | |
| {
 | |
|     ! ## Contexts
 | |
|     { (set-context) [ jit-set-context ] }
 | |
|     { (set-context-and-delete) [
 | |
|         jit-delete-current-context
 | |
|         jit-set-context
 | |
|     ] }
 | |
|     { (start-context) [ jit-start-context ] }
 | |
|     { (start-context-and-delete) [
 | |
|         jit-start-context-and-delete
 | |
|     ] }
 | |
| 
 | |
|     ! ## Entry points
 | |
|     { c-to-factor [
 | |
|         frame-reg 3 MR
 | |
| 
 | |
|         3 vm-reg MR
 | |
|         "begin_callback" jit-call
 | |
| 
 | |
|         jit-load-context
 | |
|         jit-restore-context
 | |
| 
 | |
|         ! Call quotation
 | |
|         3 frame-reg MR
 | |
|         jit-call-quot
 | |
| 
 | |
|         jit-save-context
 | |
| 
 | |
|         3 vm-reg MR
 | |
|         "end_callback" jit-call
 | |
|     ] }
 | |
|     { unwind-native-frames [
 | |
|         ! Unwind stack frames
 | |
|         1 4 MR
 | |
| 
 | |
|         ! Load VM pointer into vm-reg, since we're entering from
 | |
|         ! C code
 | |
|         vm-reg jit-load-vm
 | |
| 
 | |
|         ! Load ds and rs registers
 | |
|         jit-load-context
 | |
|         jit-restore-context
 | |
| 
 | |
|         ! We have changed the stack; load return address again
 | |
|         0 1 lr-save jit-load-cell
 | |
|         0 MTLR
 | |
| 
 | |
|         ! Call quotation
 | |
|         jit-jump-quot
 | |
|     ] }
 | |
| 
 | |
|     ! ## Fixnums
 | |
| 
 | |
|     ! ### Add
 | |
|     { fixnum+ [ [ ADDO. ] "overflow_fixnum_add" jit-overflow ] }
 | |
|     { fixnum+fast [ \ ADD jit-math ] }
 | |
| 
 | |
|     ! ### Bit stuff
 | |
|     { fixnum-bitand [ \ AND jit-math ] }
 | |
|     { fixnum-bitnot [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         3 3 NOT
 | |
|         3 3 tag-mask get XORI
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { fixnum-bitor [ \ OR jit-math ] }
 | |
|     { fixnum-bitxor [ \ XOR jit-math ] }
 | |
|     { fixnum-shift-fast [
 | |
|         3 ds-reg 0 jit-load-cell ! Load amount to shift
 | |
|         3 3 jit-shift-tag-bits   ! Shift out tag bits
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         4 ds-reg 0 jit-load-cell ! Load value to shift
 | |
|         5 4 3 jit-shift-left-logical    ! Shift left
 | |
|         6 3 NEG                         ! Negate shift amount
 | |
|         7 4 6 jit-shift-right-algebraic ! Shift right
 | |
|         7 7 jit-mask-tag-bits           ! Mask out tag bits
 | |
|         0 3 0 jit-compare-cell-imm
 | |
|         [ 0 swap BGT ] [ 5 7 MR ] jit-conditional*
 | |
|         5 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
| 
 | |
|     ! ### Comparisons
 | |
|     { both-fixnums? [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         4 ds-reg 0 jit-load-cell
 | |
|         3 3 4 OR
 | |
|         3 3 tag-mask get ANDI.
 | |
|         4 \ f type-number LI
 | |
|         0 3 0 jit-compare-cell-imm
 | |
|         [ 0 swap BNE ] [ 4 1 tag-fixnum LI ] jit-conditional*
 | |
|         4 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { eq? [ \ BEQ jit-compare ] }
 | |
|     { fixnum> [ \ BGT jit-compare ] }
 | |
|     { fixnum>= [ \ BGE jit-compare ] }
 | |
|     { fixnum< [ \ BLT jit-compare ] }
 | |
|     { fixnum<= [ \ BLE jit-compare ] }
 | |
| 
 | |
|     ! ### Div/mod
 | |
|     { fixnum-mod [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         4 ds-reg 0 jit-load-cell
 | |
|         5 4 3 jit-divide
 | |
|         6 5 3 jit-multiply-low
 | |
|         7 4 6 SUB
 | |
|         7 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { fixnum/i-fast [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         4 ds-reg 0 jit-load-cell
 | |
|         5 4 3 jit-divide
 | |
|         5 5 tag-bits get jit-shift-left-logical-imm
 | |
|         5 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { fixnum/mod-fast [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell
 | |
|         5 4 3 jit-divide
 | |
|         6 5 3 jit-multiply-low
 | |
|         7 4 6 SUB
 | |
|         5 5 tag-bits get jit-shift-left-logical-imm
 | |
|         5 ds-reg cell-size neg jit-save-cell
 | |
|         7 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
| 
 | |
|     ! ### Mul
 | |
|     { fixnum* [
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         jit-save-context
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         3 3 jit-shift-tag-bits
 | |
|         4 ds-reg cell-size jit-load-cell
 | |
|         0 0 LI
 | |
|         0 MTXER
 | |
|         6 3 4 jit-multiply-low-ov-rc
 | |
|         6 ds-reg 0 jit-save-cell
 | |
|         [ 0 swap BNS ]
 | |
|         [
 | |
|             4 4 jit-shift-tag-bits
 | |
|             5 vm-reg MR
 | |
|             "overflow_fixnum_multiply" jit-call
 | |
|         ]
 | |
|         jit-conditional*
 | |
|     ] }
 | |
|     { fixnum*fast [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell-update
 | |
|         4 4 jit-shift-tag-bits
 | |
|         5 3 4 jit-multiply-low
 | |
|         5 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
| 
 | |
|     ! ### Sub
 | |
|     { fixnum- [ [ SUBFO. ] "overflow_fixnum_subtract" jit-overflow ] }
 | |
|     { fixnum-fast [ \ SUBF jit-math ] }
 | |
| 
 | |
|     ! ## Locals
 | |
|     { drop-locals [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         3 3 jit-shift-fixnum-slot
 | |
|         rs-reg rs-reg 3 SUB
 | |
|     ] }
 | |
|     { get-local [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         3 3 jit-shift-fixnum-slot
 | |
|         3 rs-reg 3 jit-load-cell-x
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { load-local [ jit->r ] }
 | |
| 
 | |
|     ! ## Misc
 | |
|     { set-callstack [
 | |
|         7 0 LI
 | |
|         7 1 lr-save jit-save-cell
 | |
| 
 | |
|         ! Load callstack object
 | |
|         6 ds-reg 0 jit-load-cell
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         ! Get ctx->callstack_bottom
 | |
|         jit-load-context
 | |
|         3 ctx-reg context-callstack-bottom-offset jit-load-cell
 | |
|         ! Get top of callstack object -- 'src' for memcpy
 | |
|         4 6 callstack-top-offset ADDI
 | |
|         ! Get callstack length, in bytes --- 'len' for memcpy
 | |
|         7 callstack-length-offset LI
 | |
|         5 6 7 jit-load-cell-x
 | |
|         5 5 jit-shift-tag-bits
 | |
|         ! Compute new stack pointer -- 'dst' for memcpy
 | |
|         3 3 5 SUB
 | |
|         ! Install new stack pointer
 | |
|         1 3 MR
 | |
|         ! Call memcpy; arguments are now in the correct registers
 | |
|         1 1 -16 cell-size * jit-save-cell-update
 | |
|         "factor_memcpy" jit-call
 | |
|         1 1 0 jit-load-cell
 | |
|         ! Return with new callstack
 | |
|         0 1 lr-save jit-load-cell
 | |
|         0 MTLR
 | |
|         BLR
 | |
|     ] }
 | |
| 
 | |
|     ! ## Objects
 | |
|     { slot [
 | |
|         3 ds-reg 0 jit-load-cell   ! Load m
 | |
|         4 ds-reg cell-size neg jit-load-cell-update ! Load obj
 | |
|         3 3 jit-shift-fixnum-slot  ! Shift to a cell-size multiple
 | |
|         4 4 jit-mask-tag-bits      ! Clear tag bits on obj
 | |
|         3 4 3 jit-load-cell-x      ! Load cell at &obj[m]
 | |
|         3 ds-reg 0 jit-save-cell   ! Push the result to the stack
 | |
|     ] }
 | |
|     { string-nth-fast [
 | |
|         ! load string index from stack
 | |
|         3 ds-reg cell-size neg jit-load-cell
 | |
|         3 3 jit-shift-tag-bits
 | |
|         ! load string from stack
 | |
|         4 ds-reg 0 jit-load-cell
 | |
|         ! load character
 | |
|         4 4 string-offset ADDI
 | |
|         3 3 4 LBZX
 | |
|         3 3 tag-bits get jit-shift-left-logical-imm
 | |
|         ! store character to stack
 | |
|         ds-reg ds-reg cell-size SUBI
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { tag [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         3 3 tag-mask get ANDI.
 | |
|         3 3 tag-bits get jit-shift-left-logical-imm
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
| 
 | |
|     ! ## Shufflers
 | |
| 
 | |
|     ! ### Drops
 | |
|     { drop [ ds-reg dup cell-size SUBI ] }
 | |
|     { 2drop [ ds-reg dup 2 cell-size * SUBI ] }
 | |
|     { 3drop [ ds-reg dup 3 cell-size * SUBI ] }
 | |
| 
 | |
|     ! ### Dups
 | |
|     { dup [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         3 ds-reg cell-size jit-save-cell-update
 | |
|     ] }
 | |
|     { 2dup [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell
 | |
|         ds-reg dup 2 cell-size * ADDI
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|         4 ds-reg cell-size neg jit-save-cell
 | |
|     ] }
 | |
|     { 3dup [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell
 | |
|         5 ds-reg cell-size neg 2 * jit-load-cell
 | |
|         ds-reg dup cell-size 3 * ADDI
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|         4 ds-reg cell-size neg jit-save-cell
 | |
|         5 ds-reg cell-size neg 2 * jit-save-cell
 | |
|     ] }
 | |
|     { dupd [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell
 | |
|         4 ds-reg 0 jit-save-cell
 | |
|         3 ds-reg cell-size jit-save-cell-update
 | |
|     ] }
 | |
| 
 | |
|     ! ### Misc shufflers
 | |
|     { over [
 | |
|         3 ds-reg cell-size neg jit-load-cell
 | |
|         3 ds-reg cell-size jit-save-cell-update
 | |
|     ] }
 | |
|     { pick [
 | |
|         3 ds-reg cell-size neg 2 * jit-load-cell
 | |
|         3 ds-reg cell-size jit-save-cell-update
 | |
|     ] }
 | |
| 
 | |
|     ! ### Nips
 | |
|     { nip [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         ds-reg dup cell-size SUBI
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { 2nip [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         ds-reg dup cell-size 2 * SUBI
 | |
|         3 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
| 
 | |
|     ! ### Swaps
 | |
|     { -rot [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell
 | |
|         5 ds-reg cell-size neg 2 * jit-load-cell
 | |
|         3 ds-reg cell-size neg 2 * jit-save-cell
 | |
|         5 ds-reg cell-size neg jit-save-cell
 | |
|         4 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { rot [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell
 | |
|         5 ds-reg cell-size neg 2 * jit-load-cell
 | |
|         4 ds-reg cell-size neg 2 * jit-save-cell
 | |
|         3 ds-reg cell-size neg jit-save-cell
 | |
|         5 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { swap [
 | |
|         3 ds-reg 0 jit-load-cell
 | |
|         4 ds-reg cell-size neg jit-load-cell
 | |
|         3 ds-reg cell-size neg jit-save-cell
 | |
|         4 ds-reg 0 jit-save-cell
 | |
|     ] }
 | |
|     { swapd [
 | |
|         3 ds-reg cell-size neg jit-load-cell
 | |
|         4 ds-reg cell-size neg 2 * jit-load-cell
 | |
|         3 ds-reg cell-size neg 2 * jit-save-cell
 | |
|         4 ds-reg cell-size neg jit-save-cell
 | |
|     ] }
 | |
| } define-sub-primitives
 | |
| 
 | |
| [ "bootstrap.ppc" forget-vocab ] with-compilation-unit
 |