77 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			Factor
		
	
	
			
		
		
	
	
			77 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			Factor
		
	
	
USING: compiler.cfg.write-barrier compiler.cfg.instructions
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compiler.cfg.registers compiler.cfg.debugger cpu.architecture
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arrays tools.test vectors compiler.cfg kernel accessors ;
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IN: compiler.cfg.write-barrier.tests
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: test-write-barrier ( insns -- insns )
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    write-barriers-step ;
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[
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    {
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        T{ ##peek f V int-regs 4 D 0 f }
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        T{ ##copy f V int-regs 6 V int-regs 4 f }
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        T{ ##allot f V int-regs 7 24 array V int-regs 8 f }
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        T{ ##load-immediate f V int-regs 9 8 f }
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        T{ ##set-slot-imm f V int-regs 9 V int-regs 7 1 3 f }
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        T{ ##set-slot-imm f V int-regs 6 V int-regs 7 2 3 f }
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        T{ ##replace f V int-regs 7 D 0 f }
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    }
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] [
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    {
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        T{ ##peek f V int-regs 4 D 0 }
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        T{ ##copy f V int-regs 6 V int-regs 4 }
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        T{ ##allot f V int-regs 7 24 array V int-regs 8 }
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        T{ ##load-immediate f V int-regs 9 8 }
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        T{ ##set-slot-imm f V int-regs 9 V int-regs 7 1 3 }
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        T{ ##write-barrier f V int-regs 7 V int-regs 10 V int-regs 11 }
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        T{ ##set-slot-imm f V int-regs 6 V int-regs 7 2 3 }
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        T{ ##write-barrier f V int-regs 7 V int-regs 12 V int-regs 13 }
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        T{ ##replace f V int-regs 7 D 0 }
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    } test-write-barrier
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] unit-test
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[
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    {
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        T{ ##load-immediate f V int-regs 4 24 }
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        T{ ##peek f V int-regs 5 D -1 }
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        T{ ##peek f V int-regs 6 D -2 }
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        T{ ##set-slot-imm f V int-regs 5 V int-regs 6 3 2 }
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        T{ ##write-barrier f V int-regs 6 V int-regs 7 V int-regs 8 }
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    }
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] [
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    {
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        T{ ##load-immediate f V int-regs 4 24 }
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        T{ ##peek f V int-regs 5 D -1 }
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        T{ ##peek f V int-regs 6 D -2 }
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        T{ ##set-slot-imm f V int-regs 5 V int-regs 6 3 2 }
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        T{ ##write-barrier f V int-regs 6 V int-regs 7 V int-regs 8 }
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    } test-write-barrier
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] unit-test
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[
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    {
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        T{ ##peek f V int-regs 19 D -3 }
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        T{ ##peek f V int-regs 22 D -2 }
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        T{ ##copy f V int-regs 23 V int-regs 19 }
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        T{ ##set-slot-imm f V int-regs 22 V int-regs 23 3 2 }
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        T{ ##write-barrier f V int-regs 23 V int-regs 24 V int-regs 25 }
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        T{ ##copy f V int-regs 26 V int-regs 19 }
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        T{ ##peek f V int-regs 28 D -1 }
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        T{ ##copy f V int-regs 29 V int-regs 19 }
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        T{ ##set-slot-imm f V int-regs 28 V int-regs 29 4 2 }
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    }
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] [
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    {
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        T{ ##peek f V int-regs 19 D -3 }
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        T{ ##peek f V int-regs 22 D -2 }
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        T{ ##copy f V int-regs 23 V int-regs 19 }
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        T{ ##set-slot-imm f V int-regs 22 V int-regs 23 3 2 }
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        T{ ##write-barrier f V int-regs 23 V int-regs 24 V int-regs 25 }
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        T{ ##copy f V int-regs 26 V int-regs 19 }
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        T{ ##peek f V int-regs 28 D -1 }
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        T{ ##copy f V int-regs 29 V int-regs 19 }
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        T{ ##set-slot-imm f V int-regs 28 V int-regs 29 4 2 }
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        T{ ##write-barrier f V int-regs 29 V int-regs 30 V int-regs 3 }
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    } test-write-barrier
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] unit-test
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