146 lines
5.1 KiB
Factor
146 lines
5.1 KiB
Factor
USING: compiler.cfg.instructions
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compiler.cfg.linear-scan.allocation.state
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compiler.cfg.linear-scan.mapping cpu.architecture kernel
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namespaces tools.test ;
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IN: compiler.cfg.linear-scan.mapping.tests
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H{ { int-regs 10 } { float-regs 20 } } clone spill-counts set
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init-mapping
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[
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{
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T{ _copy { dst 5 } { src 4 } { class int-regs } }
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T{ _spill { src 1 } { class int-regs } { n 10 } }
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T{ _copy { dst 1 } { src 0 } { class int-regs } }
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T{ _reload { dst 0 } { class int-regs } { n 10 } }
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T{ _spill { src 1 } { class float-regs } { n 20 } }
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T{ _copy { dst 1 } { src 0 } { class float-regs } }
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T{ _reload { dst 0 } { class float-regs } { n 20 } }
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}
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] [
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{
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T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
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T{ register->register { from 1 } { to 0 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 1 } { reg-class float-regs } }
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T{ register->register { from 1 } { to 0 } { reg-class float-regs } }
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T{ register->register { from 4 } { to 5 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{
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T{ _spill { src 2 } { class int-regs } { n 10 } }
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T{ _copy { dst 2 } { src 1 } { class int-regs } }
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T{ _copy { dst 1 } { src 0 } { class int-regs } }
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T{ _reload { dst 0 } { class int-regs } { n 10 } }
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}
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] [
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{
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T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
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T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
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T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{
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T{ _spill { src 0 } { class int-regs } { n 10 } }
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T{ _copy { dst 0 } { src 2 } { class int-regs } }
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T{ _copy { dst 2 } { src 1 } { class int-regs } }
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T{ _reload { dst 1 } { class int-regs } { n 10 } }
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}
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] [
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{
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T{ register->register { from 1 } { to 2 } { reg-class int-regs } }
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T{ register->register { from 2 } { to 0 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{
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T{ _copy { dst 1 } { src 0 } { class int-regs } }
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T{ _copy { dst 2 } { src 0 } { class int-regs } }
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}
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] [
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{
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T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{ }
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] [
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{
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T{ register->register { from 4 } { to 4 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{
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T{ _spill { src 3 } { class int-regs } { n 4 } }
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T{ _reload { dst 2 } { class int-regs } { n 1 } }
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}
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] [
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{
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T{ register->memory { from 3 } { to T{ spill-slot f 4 } } { reg-class int-regs } }
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T{ memory->register { from T{ spill-slot f 1 } } { to 2 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{
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T{ _copy { dst 1 } { src 0 } { class int-regs } }
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T{ _copy { dst 2 } { src 0 } { class int-regs } }
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T{ _copy { dst 0 } { src 3 } { class int-regs } }
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}
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] [
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{
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T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
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T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{
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T{ _copy { dst 1 } { src 0 } { class int-regs } }
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T{ _copy { dst 2 } { src 0 } { class int-regs } }
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T{ _spill { src 4 } { class int-regs } { n 10 } }
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T{ _copy { dst 4 } { src 0 } { class int-regs } }
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T{ _copy { dst 0 } { src 3 } { class int-regs } }
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T{ _reload { dst 3 } { class int-regs } { n 10 } }
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}
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] [
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{
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T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
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T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
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T{ register->register { from 4 } { to 3 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 4 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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[
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{
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T{ _copy { dst 2 } { src 0 } { class int-regs } }
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T{ _copy { dst 9 } { src 1 } { class int-regs } }
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T{ _copy { dst 1 } { src 0 } { class int-regs } }
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T{ _spill { src 4 } { class int-regs } { n 10 } }
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T{ _copy { dst 4 } { src 0 } { class int-regs } }
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T{ _copy { dst 0 } { src 3 } { class int-regs } }
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T{ _reload { dst 3 } { class int-regs } { n 10 } }
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}
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] [
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{
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T{ register->register { from 0 } { to 1 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 2 } { reg-class int-regs } }
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T{ register->register { from 1 } { to 9 } { reg-class int-regs } }
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T{ register->register { from 3 } { to 0 } { reg-class int-regs } }
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T{ register->register { from 4 } { to 3 } { reg-class int-regs } }
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T{ register->register { from 0 } { to 4 } { reg-class int-regs } }
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} mapping-instructions
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] unit-test
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