623 lines
16 KiB
Factor
623 lines
16 KiB
Factor
! Copyright (C) 2007, 2011 Slava Pestov.
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! See http://factorcode.org/license.txt for BSD license.
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USING: bootstrap.image.private compiler.codegen.relocation
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compiler.constants compiler.units cpu.x86.assembler
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cpu.x86.assembler.operands kernel kernel.private layouts locals
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locals.backend math math.private memory namespaces sequences
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slots.private strings.private vocabs ;
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IN: bootstrap.x86
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: temp0/32 ( -- reg )
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temp0 32-bit-version-of ;
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: temp1/32 ( -- reg )
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temp1 32-bit-version-of ;
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big-endian off
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! C to Factor entry point
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[
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! Optimizing compiler's side of callback accesses
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! arguments that are on the stack via the frame pointer.
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! On x86-32 fastcall, and x86-64, some arguments are passed
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! in registers, and so the only registers that are safe for
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! use here are frame-reg, nv-reg and vm-reg.
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frame-reg PUSH
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frame-reg stack-reg MOV
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! Save all non-volatile registers
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nv-regs [ PUSH ] each
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jit-save-tib
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! Load VM into vm-reg
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vm-reg 0 MOV 0 rc-absolute-cell rel-vm
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! Save old context
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nv-reg vm-reg vm-context-offset [+] MOV
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nv-reg PUSH
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! Switch over to the spare context
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nv-reg vm-reg vm-spare-context-offset [+] MOV
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vm-reg vm-context-offset [+] nv-reg MOV
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! Save C callstack pointer
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nv-reg context-callstack-save-offset [+] stack-reg MOV
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! Load Factor stack pointers
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stack-reg nv-reg context-callstack-bottom-offset [+] MOV
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nv-reg jit-update-tib
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jit-install-seh
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rs-reg nv-reg context-retainstack-offset [+] MOV
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ds-reg nv-reg context-datastack-offset [+] MOV
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! Call into Factor code
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link-reg 0 MOV f rc-absolute-cell rel-word
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link-reg CALL
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! Load VM into vm-reg; only needed on x86-32, but doesn't
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! hurt on x86-64
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vm-reg 0 MOV 0 rc-absolute-cell rel-vm
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! Load C callstack pointer
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nv-reg vm-reg vm-context-offset [+] MOV
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stack-reg nv-reg context-callstack-save-offset [+] MOV
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! Load old context
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nv-reg POP
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vm-reg vm-context-offset [+] nv-reg MOV
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! Restore non-volatile registers
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jit-restore-tib
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nv-regs <reversed> [ POP ] each
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frame-reg POP
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! Callbacks which return structs, or use stdcall/fastcall/thiscall,
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! need a parameter here.
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! See the comment for M\ x86.32 stack-cleanup in cpu.x86.32
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0xffff RET f rc-absolute-2 rel-untagged
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] CALLBACK-STUB jit-define
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[
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! load literal
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temp0 0 MOV f rc-absolute-cell rel-literal
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! increment datastack pointer
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ds-reg bootstrap-cell ADD
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! store literal on datastack
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ds-reg [] temp0 MOV
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] JIT-PUSH-LITERAL jit-define
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[
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0 CALL f rc-relative rel-word-pic
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] JIT-WORD-CALL jit-define
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! The *-signal-handler subprimitives are special-cased in vm/quotations.cpp
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! not to trigger generation of a stack frame, so they can
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! peform their own prolog/epilog preserving registers.
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!
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! It is important that the total is 192/64 and that it matches the
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! constants in vm/cpu-x86.*.hpp
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: jit-signal-handler-prolog ( -- )
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! Return address already on stack -> 8/4 bytes.
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! Push all registers. 15 regs/120 bytes on 64bit, 7 regs/28 bytes
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! on 32bit -> 128/32 bytes.
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signal-handler-save-regs [ PUSH ] each
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! Push flags -> 136/36 bytes
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PUSHF
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! Register parameter area 32 bytes, unused on platforms other than
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! windows 64 bit, but including it doesn't hurt. Plus
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! alignment. LEA used so we don't dirty flags -> 192/64 bytes.
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stack-reg stack-reg 7 bootstrap-cells neg [+] LEA
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jit-load-vm ;
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: jit-signal-handler-epilog ( -- )
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stack-reg stack-reg 7 bootstrap-cells [+] LEA
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POPF
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signal-handler-save-regs reverse [ POP ] each ;
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[
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! load boolean
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temp0 ds-reg [] MOV
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! pop boolean
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ds-reg bootstrap-cell SUB
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! compare boolean with f
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temp0 \ f type-number CMP
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! jump to true branch if not equal
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0 JNE f rc-relative rel-word
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! jump to false branch if equal
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0 JMP f rc-relative rel-word
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] JIT-IF jit-define
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: jit->r ( -- )
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rs-reg bootstrap-cell ADD
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temp0 ds-reg [] MOV
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ds-reg bootstrap-cell SUB
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rs-reg [] temp0 MOV ;
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: jit-2>r ( -- )
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rs-reg 2 bootstrap-cells ADD
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temp0 ds-reg [] MOV
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temp1 ds-reg -1 bootstrap-cells [+] MOV
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ds-reg 2 bootstrap-cells SUB
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rs-reg [] temp0 MOV
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rs-reg -1 bootstrap-cells [+] temp1 MOV ;
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: jit-3>r ( -- )
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rs-reg 3 bootstrap-cells ADD
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temp0 ds-reg [] MOV
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temp1 ds-reg -1 bootstrap-cells [+] MOV
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temp2 ds-reg -2 bootstrap-cells [+] MOV
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ds-reg 3 bootstrap-cells SUB
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rs-reg [] temp0 MOV
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rs-reg -1 bootstrap-cells [+] temp1 MOV
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rs-reg -2 bootstrap-cells [+] temp2 MOV ;
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: jit-r> ( -- )
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ds-reg bootstrap-cell ADD
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temp0 rs-reg [] MOV
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rs-reg bootstrap-cell SUB
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ds-reg [] temp0 MOV ;
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: jit-2r> ( -- )
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ds-reg 2 bootstrap-cells ADD
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temp0 rs-reg [] MOV
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temp1 rs-reg -1 bootstrap-cells [+] MOV
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rs-reg 2 bootstrap-cells SUB
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ds-reg [] temp0 MOV
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ds-reg -1 bootstrap-cells [+] temp1 MOV ;
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: jit-3r> ( -- )
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ds-reg 3 bootstrap-cells ADD
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temp0 rs-reg [] MOV
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temp1 rs-reg -1 bootstrap-cells [+] MOV
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temp2 rs-reg -2 bootstrap-cells [+] MOV
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rs-reg 3 bootstrap-cells SUB
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ds-reg [] temp0 MOV
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ds-reg -1 bootstrap-cells [+] temp1 MOV
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ds-reg -2 bootstrap-cells [+] temp2 MOV ;
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[
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jit->r
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0 CALL f rc-relative rel-word
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jit-r>
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] JIT-DIP jit-define
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[
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jit-2>r
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0 CALL f rc-relative rel-word
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jit-2r>
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] JIT-2DIP jit-define
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[
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jit-3>r
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0 CALL f rc-relative rel-word
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jit-3r>
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] JIT-3DIP jit-define
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[
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! load from stack
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temp0 ds-reg [] MOV
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! pop stack
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ds-reg bootstrap-cell SUB
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]
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[ temp0 word-entry-point-offset [+] CALL ]
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[ temp0 word-entry-point-offset [+] JMP ]
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\ (execute) define-combinator-primitive
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[
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temp0 ds-reg [] MOV
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ds-reg bootstrap-cell SUB
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temp0 word-entry-point-offset [+] JMP
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] JIT-EXECUTE jit-define
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[
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stack-reg stack-frame-size bootstrap-cell - SUB
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] JIT-PROLOG jit-define
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[
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stack-reg stack-frame-size bootstrap-cell - ADD
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] JIT-EPILOG jit-define
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[ 0 RET ] JIT-RETURN jit-define
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! ! ! Polymorphic inline caches
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! The PIC stubs are not permitted to touch pic-tail-reg.
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! Load a value from a stack position
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[
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temp1 ds-reg 0x7f [+] MOV f rc-absolute-1 rel-untagged
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] PIC-LOAD jit-define
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[ temp1/32 tag-mask get AND ] PIC-TAG jit-define
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[
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temp0 temp1 MOV
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temp1/32 tag-mask get AND
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temp1/32 tuple type-number CMP
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[ JNE ]
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[ temp1 temp0 tuple-class-offset [+] MOV ]
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jit-conditional
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] PIC-TUPLE jit-define
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[
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temp1/32 0x7f CMP f rc-absolute-1 rel-untagged
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] PIC-CHECK-TAG jit-define
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[ 0 JE f rc-relative rel-word ] PIC-HIT jit-define
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! ! ! Megamorphic caches
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[
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! class = ...
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temp0 temp1 MOV
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temp1/32 tag-mask get AND
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temp1/32 tag-bits get SHL
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temp1/32 tuple type-number tag-fixnum CMP
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[ JNE ]
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[ temp1 temp0 tuple-class-offset [+] MOV ]
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jit-conditional
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! cache = ...
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temp0 0 MOV f rc-absolute-cell rel-literal
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! key = hashcode(class)
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temp2 temp1 MOV
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bootstrap-cell 4 = [ temp2 1 SHR ] when
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! key &= cache.length - 1
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temp2 mega-cache-size get 1 - bootstrap-cell * AND
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! cache += array-start-offset
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temp0 array-start-offset ADD
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! cache += key
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temp0 temp2 ADD
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! if(get(cache) == class)
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temp0 [] temp1 CMP
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[ JNE ]
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[
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! megamorphic_cache_hits++
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temp1 0 MOV rc-absolute-cell rel-megamorphic-cache-hits
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temp1 [] 1 ADD
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! goto get(cache + bootstrap-cell)
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temp0 temp0 bootstrap-cell [+] MOV
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temp0 word-entry-point-offset [+] JMP
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! fall-through on miss
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] jit-conditional
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] MEGA-LOOKUP jit-define
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! Comparisons
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: jit-compare ( insn -- )
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! load t
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temp3 0 MOV t rc-absolute-cell rel-literal
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! load f
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temp1 \ f type-number MOV
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! load first value
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temp0 ds-reg [] MOV
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! adjust stack pointer
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ds-reg bootstrap-cell SUB
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! compare with second value
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ds-reg [] temp0 CMP
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! move t if true
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[ temp1 temp3 ] dip execute( dst src -- )
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! store
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ds-reg [] temp1 MOV ;
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! Math
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: jit-math ( insn -- )
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! load second input
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temp0 ds-reg [] MOV
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! pop stack
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ds-reg bootstrap-cell SUB
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! compute result
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[ ds-reg [] temp0 ] dip execute( dst src -- ) ;
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: jit-fixnum-/mod ( -- )
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! load second parameter
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temp1 ds-reg [] MOV
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! load first parameter
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div-arg ds-reg bootstrap-cell neg [+] MOV
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! make a copy
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mod-arg div-arg MOV
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! sign-extend
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mod-arg bootstrap-cell-bits 1 - SAR
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! divide
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temp1 IDIV ;
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! # All x86 subprimitives
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{
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! ## Fixnums
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! ### Add
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{ fixnum+fast [ \ ADD jit-math ] }
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! ### Bit stuff
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{ fixnum-bitand [ \ AND jit-math ] }
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{ fixnum-bitnot [
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! complement
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ds-reg [] NOT
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! clear tag bits
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ds-reg [] tag-mask get XOR
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] }
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{ fixnum-bitor [ \ OR jit-math ] }
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{ fixnum-bitxor [ \ XOR jit-math ] }
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{ fixnum-shift-fast [
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! load shift count
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shift-arg ds-reg [] MOV
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! untag shift count
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shift-arg tag-bits get SAR
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! adjust stack pointer
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ds-reg bootstrap-cell SUB
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! load value
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temp3 ds-reg [] MOV
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! make a copy
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temp2 temp3 MOV
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! compute positive shift value in temp2
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temp2 CL SHL
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shift-arg NEG
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! compute negative shift value in temp3
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temp3 CL SAR
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temp3 tag-mask get bitnot AND
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shift-arg 0 CMP
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! if shift count was negative, move temp0 to temp2
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temp2 temp3 CMOVGE
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! push to stack
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ds-reg [] temp2 MOV
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] }
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! ### Comparisons
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{ both-fixnums? [
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temp0 ds-reg [] MOV
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ds-reg bootstrap-cell SUB
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temp0 ds-reg [] OR
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temp0 tag-mask get TEST
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temp0 \ f type-number MOV
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temp1 1 tag-fixnum MOV
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temp0 temp1 CMOVE
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ds-reg [] temp0 MOV
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] }
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{ eq? [ \ CMOVE jit-compare ] }
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{ fixnum> [ \ CMOVG jit-compare ] }
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{ fixnum>= [ \ CMOVGE jit-compare ] }
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{ fixnum< [ \ CMOVL jit-compare ] }
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{ fixnum<= [ \ CMOVLE jit-compare ] }
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! ### Div/mod
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{ fixnum-mod [
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jit-fixnum-/mod
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! adjust stack pointer
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ds-reg bootstrap-cell SUB
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! push to stack
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ds-reg [] mod-arg MOV
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] }
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{ fixnum/i-fast [
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jit-fixnum-/mod
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! adjust stack pointer
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ds-reg bootstrap-cell SUB
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! tag it
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div-arg tag-bits get SHL
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! push to stack
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ds-reg [] div-arg MOV
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] }
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{ fixnum/mod-fast [
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jit-fixnum-/mod
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! tag it
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div-arg tag-bits get SHL
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! push to stack
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ds-reg [] mod-arg MOV
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ds-reg bootstrap-cell neg [+] div-arg MOV
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] }
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! ### Mul
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{ fixnum*fast [
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! load second input
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temp0 ds-reg [] MOV
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! pop stack
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ds-reg bootstrap-cell SUB
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! load first input
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temp1 ds-reg [] MOV
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! untag second input
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temp0 tag-bits get SAR
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! multiply
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temp0 temp1 IMUL2
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! push result
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ds-reg [] temp0 MOV
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] }
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! ### Sub
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{ fixnum-fast [ \ SUB jit-math ] }
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! ## Locals
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{ drop-locals [
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! load local count
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temp0 ds-reg [] MOV
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! adjust stack pointer
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ds-reg bootstrap-cell SUB
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! turn local number into offset
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fixnum>slot@
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! decrement retain stack pointer
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rs-reg temp0 SUB
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] }
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{ get-local [
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! load local number
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temp0 ds-reg [] MOV
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! turn local number into offset
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fixnum>slot@
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! load local value
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temp0 rs-reg temp0 [+] MOV
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! push to stack
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ds-reg [] temp0 MOV
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] }
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{ load-local [ jit->r ] }
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! ## Objects
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{ slot [
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! load slot number
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temp0 ds-reg [] MOV
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! adjust stack pointer
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ds-reg bootstrap-cell SUB
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! load object
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temp1 ds-reg [] MOV
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! turn slot number into offset
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fixnum>slot@
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! mask off tag
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temp1 tag-bits get SHR
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temp1 tag-bits get SHL
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! load slot value
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temp0 temp1 temp0 [+] MOV
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! push to stack
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ds-reg [] temp0 MOV
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] }
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{ string-nth-fast [
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! load string index from stack
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temp0 ds-reg bootstrap-cell neg [+] MOV
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temp0 tag-bits get SHR
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! load string from stack
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temp1 ds-reg [] MOV
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! load character
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temp0 8-bit-version-of temp0 temp1 string-offset [++] MOV
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temp0 temp0 8-bit-version-of MOVZX
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temp0 tag-bits get SHL
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! store character to stack
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ds-reg bootstrap-cell SUB
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ds-reg [] temp0 MOV
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] }
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{ tag [
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! load from stack
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temp0 ds-reg [] MOV
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! compute tag
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temp0/32 tag-mask get AND
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! tag the tag
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temp0/32 tag-bits get SHL
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! push to stack
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ds-reg [] temp0 MOV
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] }
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! ## Shufflers
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! ### Drops
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{ drop [ ds-reg bootstrap-cell SUB ] }
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{ 2drop [ ds-reg 2 bootstrap-cells SUB ] }
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{ 3drop [ ds-reg 3 bootstrap-cells SUB ] }
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{ 4drop [ ds-reg 4 bootstrap-cells SUB ] }
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! ### Dups
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{ dup [
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temp0 ds-reg [] MOV
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ds-reg bootstrap-cell ADD
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ds-reg [] temp0 MOV
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] }
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{ 2dup [
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temp0 ds-reg [] MOV
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temp1 ds-reg bootstrap-cell neg [+] MOV
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ds-reg 2 bootstrap-cells ADD
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ds-reg [] temp0 MOV
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ds-reg bootstrap-cell neg [+] temp1 MOV
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] }
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{ 3dup [
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temp0 ds-reg [] MOV
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temp1 ds-reg -1 bootstrap-cells [+] MOV
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temp3 ds-reg -2 bootstrap-cells [+] MOV
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ds-reg 3 bootstrap-cells ADD
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ds-reg [] temp0 MOV
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ds-reg -1 bootstrap-cells [+] temp1 MOV
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ds-reg -2 bootstrap-cells [+] temp3 MOV
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] }
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{ 4dup [
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temp0 ds-reg [] MOV
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temp1 ds-reg -1 bootstrap-cells [+] MOV
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temp2 ds-reg -2 bootstrap-cells [+] MOV
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temp3 ds-reg -3 bootstrap-cells [+] MOV
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ds-reg 4 bootstrap-cells ADD
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ds-reg [] temp0 MOV
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ds-reg -1 bootstrap-cells [+] temp1 MOV
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ds-reg -2 bootstrap-cells [+] temp2 MOV
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ds-reg -3 bootstrap-cells [+] temp3 MOV
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] }
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{ dupd [
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temp0 ds-reg [] MOV
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temp1 ds-reg -1 bootstrap-cells [+] MOV
|
|
ds-reg [] temp1 MOV
|
|
ds-reg bootstrap-cell ADD
|
|
ds-reg [] temp0 MOV
|
|
] }
|
|
|
|
! ### Misc shufflers
|
|
{ over [
|
|
temp0 ds-reg -1 bootstrap-cells [+] MOV
|
|
ds-reg bootstrap-cell ADD
|
|
ds-reg [] temp0 MOV
|
|
] }
|
|
{ pick [
|
|
temp0 ds-reg -2 bootstrap-cells [+] MOV
|
|
ds-reg bootstrap-cell ADD
|
|
ds-reg [] temp0 MOV
|
|
] }
|
|
|
|
! ### Nips
|
|
{ nip [
|
|
temp0 ds-reg [] MOV
|
|
ds-reg bootstrap-cell SUB
|
|
ds-reg [] temp0 MOV
|
|
] }
|
|
{ 2nip [
|
|
temp0 ds-reg [] MOV
|
|
ds-reg 2 bootstrap-cells SUB
|
|
ds-reg [] temp0 MOV
|
|
] }
|
|
|
|
! ### Swaps
|
|
{ -rot [
|
|
temp0 ds-reg [] MOV
|
|
temp1 ds-reg -1 bootstrap-cells [+] MOV
|
|
temp3 ds-reg -2 bootstrap-cells [+] MOV
|
|
ds-reg -2 bootstrap-cells [+] temp0 MOV
|
|
ds-reg -1 bootstrap-cells [+] temp3 MOV
|
|
ds-reg [] temp1 MOV
|
|
] }
|
|
{ rot [
|
|
temp0 ds-reg [] MOV
|
|
temp1 ds-reg -1 bootstrap-cells [+] MOV
|
|
temp3 ds-reg -2 bootstrap-cells [+] MOV
|
|
ds-reg -2 bootstrap-cells [+] temp1 MOV
|
|
ds-reg -1 bootstrap-cells [+] temp0 MOV
|
|
ds-reg [] temp3 MOV
|
|
] }
|
|
{ swap [
|
|
temp0 ds-reg [] MOV
|
|
temp1 ds-reg bootstrap-cell neg [+] MOV
|
|
ds-reg bootstrap-cell neg [+] temp0 MOV
|
|
ds-reg [] temp1 MOV
|
|
] }
|
|
{ swapd [
|
|
temp0 ds-reg -1 bootstrap-cells [+] MOV
|
|
temp1 ds-reg -2 bootstrap-cells [+] MOV
|
|
ds-reg -2 bootstrap-cells [+] temp0 MOV
|
|
ds-reg -1 bootstrap-cells [+] temp1 MOV
|
|
] }
|
|
|
|
! ## Signal handling
|
|
{ leaf-signal-handler [
|
|
jit-signal-handler-prolog
|
|
jit-save-context
|
|
temp0 vm-reg vm-signal-handler-addr-offset [+] MOV
|
|
temp0 CALL
|
|
jit-signal-handler-epilog
|
|
! Pop the fake leaf frame along with our return address
|
|
leaf-stack-frame-size bootstrap-cell - RET
|
|
] }
|
|
{ signal-handler [
|
|
jit-signal-handler-prolog
|
|
jit-save-context
|
|
temp0 vm-reg vm-signal-handler-addr-offset [+] MOV
|
|
temp0 CALL
|
|
jit-signal-handler-epilog
|
|
0 RET
|
|
] }
|
|
} define-sub-primitives
|
|
|
|
[ "bootstrap.x86" forget-vocab ] with-compilation-unit
|