75 lines
3.2 KiB
Factor
75 lines
3.2 KiB
Factor
USING: assocs compiler.cfg compiler.cfg.instructions
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compiler.cfg.linear-scan.live-intervals
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compiler.cfg.linear-scan.allocation.state compiler.cfg.liveness
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compiler.cfg.registers heaps help.markup help.syntax math ;
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IN: compiler.cfg.linear-scan.assignment
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HELP: add-pending
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{ $values { "live-interval" live-interval-state } }
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{ $description "Adds a live interval to the pending interval set." } ;
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HELP: assign-derived-roots
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{ $values { "gc-map" gc-map } }
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{ $description "Assigns pairs of spill slots for all derived roots in a gc map." } ;
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{ assign-gc-roots assign-derived-roots } related-words
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HELP: assign-gc-roots
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{ $values { "gc-map" gc-map } }
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{ $description "Assigns spill slots for all gc roots in a gc map." } ;
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HELP: assign-registers-in-block
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{ $values { "bb" basic-block } }
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{ $description "Assigns registers and also inserts " { $link ##reload } " and " { $link ##spill } " instructions." } ;
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HELP: assign-registers-in-insn
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{ $values { "insn" insn } }
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{ $description "Assigns physical registers and spill slots for the virtual registers used by the instruction." } ;
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HELP: compute-live-in
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{ $values { "bb" basic-block } }
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{ $see-also machine-live-ins } ;
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HELP: machine-edge-live-ins
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{ $var-description "Mapping from basic blocks to predecessors to values which are live on a particular incoming edge." } ;
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HELP: machine-live-ins
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{ $var-description "Mapping from basic blocks to values which are live at the start on all incoming CFG edges. It's like " { $link live-ins } " except the registers are physical instead of virtual." } ;
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HELP: machine-live-outs
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{ $var-description "Mapping from " { $link basic-block } " to an " { $link assoc } " of pairs which are the values that are live at the end. The keys of the pairs are virtual registers and the values are either real registers or spill slots." } ;
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HELP: remove-pending
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{ $values { "live-interval" live-interval-state } }
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{ $description "Removes a pending live interval." } ;
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HELP: unhandled-intervals
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{ $var-description { $link min-heap } " of live intervals which still need a register allocation." } ;
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HELP: vreg>reg
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{ $values { "vreg" "virtual register" } { "reg/spill-slot" "a register or a spill slot" } }
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{ $description "Translates a virtual register to a physical one. If the vreg is not in the pending set, then it must have been spilled and its spill slot is returned." }
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{ $errors "Can throw a " { $link bad-vreg } " error if the vreg is not in the " { $link pending-interval-assoc } " and also doesn't have a spill slot registered." }
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{ $see-also lookup-spill-slot pending-interval-assoc } ;
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HELP: vregs>regs
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{ $values { "vregs" "a sequence of virtual registers" } { "assoc" assoc } }
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{ $description "Creates a mapping of virtual registers to registers." } ;
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HELP: vreg>spill-slot
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{ $values { "vreg" integer } { "spill-slot" spill-slot } }
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{ $description "Converts a vreg number to a spill slot." } ;
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ARTICLE: "compiler.cfg.linear-scan.assignment" "Assigning registers to live intervals"
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"The " { $vocab-link "compiler.cfg.linear-scan.assignment" } " assigns registers to live intervals." $nl
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"Pending intervals:"
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{ $subsections
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activate-interval
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add-pending
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pending-interval-assoc
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remove-pending
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}
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"Vreg transformations:"
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{ $subsections vreg>reg vreg>spill-slot vregs>regs } ;
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ABOUT: "compiler.cfg.linear-scan.assignment"
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