282 lines
5.4 KiB
Factor
282 lines
5.4 KiB
Factor
USING: accessors compiler.cfg compiler.cfg.debugger
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compiler.cfg.instructions compiler.cfg.registers
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compiler.cfg.representations.preferred cpu.architecture kernel
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namespaces tools.test sequences arrays system literals layouts
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math compiler.constants compiler.cfg.representations.conversion
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compiler.cfg.representations.rewrite make ;
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IN: compiler.cfg.representations
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[ { double-rep double-rep } ] [
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T{ ##add-float
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{ dst 5 }
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{ src1 3 }
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{ src2 4 }
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} uses-vreg-reps
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] unit-test
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[ double-rep ] [
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T{ ##load-memory-imm
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{ dst 5 }
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{ base 3 }
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{ offset 0 }
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{ rep double-rep }
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} defs-vreg-rep
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] unit-test
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H{ } clone representations set
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3 \ vreg-counter set-global
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[
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{
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T{ ##allot f 2 16 float 4 }
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T{ ##store-memory-imm f 1 2 $[ float-offset ] double-rep f }
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}
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] [
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[
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2 1 tagged-rep double-rep emit-conversion
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] { } make
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] unit-test
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[
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{
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T{ ##load-memory-imm f 2 1 $[ float-offset ] double-rep f }
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}
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] [
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[
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2 1 double-rep tagged-rep emit-conversion
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] { } make
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] unit-test
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: test-representations ( -- )
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cfg new 0 get >>entry dup cfg set select-representations drop ;
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! Make sure cost calculation isn't completely wrong
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V{
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T{ ##prologue }
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T{ ##branch }
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} 0 test-bb
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V{
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T{ ##peek f 1 D 0 }
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T{ ##peek f 2 D 1 }
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T{ ##add-float f 3 1 2 }
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T{ ##replace f 3 D 0 }
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T{ ##replace f 3 D 1 }
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T{ ##replace f 3 D 2 }
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T{ ##branch }
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} 1 test-bb
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V{
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T{ ##epilogue }
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T{ ##return }
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} 2 test-bb
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0 1 edge
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1 2 edge
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[ ] [ test-representations ] unit-test
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[ 1 ] [ 1 get instructions>> [ ##allot? ] count ] unit-test
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! Converting a ##load-integer into a ##load-tagged
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V{
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T{ ##prologue }
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T{ ##branch }
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} 0 test-bb
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V{
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T{ ##load-integer f 1 100 }
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T{ ##replace f 1 D 0 }
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T{ ##branch }
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} 1 test-bb
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V{
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T{ ##epilogue }
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T{ ##return }
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} 2 test-bb
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0 1 edge
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1 2 edge
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[ ] [ test-representations ] unit-test
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[ T{ ##load-tagged f 1 $[ 100 tag-fixnum ] } ]
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[ 1 get instructions>> first ]
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unit-test
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! scalar-rep => int-rep conversion
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V{
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T{ ##prologue }
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T{ ##branch }
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} 0 test-bb
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V{
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T{ ##peek f 1 D 0 }
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T{ ##peek f 2 D 0 }
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T{ ##vector>scalar f 3 2 int-4-rep }
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T{ ##shl f 4 1 3 }
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T{ ##replace f 4 D 0 }
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T{ ##branch }
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} 1 test-bb
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V{
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T{ ##epilogue }
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T{ ##return }
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} 2 test-bb
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0 1 edge
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1 2 edge
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[ ] [ test-representations ] unit-test
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[ t ] [ 1 get instructions>> 4 swap nth ##scalar>integer? ] unit-test
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cpu x86.32? [
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! Make sure load-constant is converted into load-double
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V{
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T{ ##prologue }
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T{ ##branch }
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} 0 test-bb
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V{
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T{ ##peek f 1 D 0 }
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T{ ##load-reference f 2 0.5 }
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T{ ##add-float f 3 1 2 }
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T{ ##replace f 3 D 0 }
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T{ ##branch }
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} 1 test-bb
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V{
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T{ ##epilogue }
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T{ ##return }
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} 2 test-bb
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0 1 edge
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1 2 edge
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[ ] [ test-representations ] unit-test
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[ t ] [ 1 get instructions>> second ##load-double? ] unit-test
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! Make sure phi nodes are handled in a sane way
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V{
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T{ ##prologue }
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T{ ##branch }
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} 0 test-bb
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V{
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T{ ##peek f 1 D 0 }
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T{ ##compare-imm-branch f 1 2 }
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} 1 test-bb
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V{
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T{ ##load-reference f 2 1.5 }
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T{ ##branch }
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} 2 test-bb
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V{
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T{ ##load-reference f 3 2.5 }
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T{ ##branch }
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} 3 test-bb
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V{
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T{ ##phi f 4 }
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T{ ##peek f 5 D 0 }
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T{ ##add-float f 6 4 5 }
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T{ ##replace f 6 D 0 }
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} 4 test-bb
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V{
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T{ ##epilogue }
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T{ ##return }
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} 5 test-bb
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test-diamond
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4 5 edge
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2 get 2 2array
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3 get 3 2array 2array 4 get instructions>> first (>>inputs)
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[ ] [ test-representations ] unit-test
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[ t ] [ 2 get instructions>> first ##load-double? ] unit-test
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[ t ] [ 3 get instructions>> first ##load-double? ] unit-test
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[ t ] [ 4 get instructions>> first ##phi? ] unit-test
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] when
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! Peephole optimization if input to ##shl-imm is tagged
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3 \ vreg-counter set-global
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V{
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T{ ##peek f 1 D 0 }
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T{ ##shl-imm f 2 1 3 }
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T{ ##replace f 2 D 0 }
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} 0 test-bb
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[ ] [ test-representations ] unit-test
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[
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V{
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T{ ##peek f 1 D 0 }
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T{ ##sar-imm f 2 1 1 }
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T{ ##shl-imm f 4 2 $[ tag-bits get ] }
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T{ ##replace f 4 D 0 }
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}
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] [ 0 get instructions>> ] unit-test
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V{
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T{ ##peek f 1 D 0 }
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T{ ##shl-imm f 2 1 10 }
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T{ ##replace f 2 D 0 }
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} 0 test-bb
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[ ] [ test-representations ] unit-test
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[
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V{
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T{ ##peek f 1 D 0 }
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T{ ##shl-imm f 2 1 $[ 10 tag-bits get - ] }
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T{ ##shl-imm f 5 2 $[ tag-bits get ] }
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T{ ##replace f 5 D 0 }
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}
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] [ 0 get instructions>> ] unit-test
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V{
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T{ ##peek f 1 D 0 }
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T{ ##shl-imm f 2 1 $[ tag-bits get ] }
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T{ ##replace f 2 D 0 }
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} 0 test-bb
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[ ] [ test-representations ] unit-test
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[
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V{
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T{ ##peek f 1 D 0 }
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T{ ##copy f 2 1 int-rep }
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T{ ##shl-imm f 6 2 $[ tag-bits get ] }
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T{ ##replace f 6 D 0 }
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}
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] [ 0 get instructions>> ] unit-test
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! Peephole optimization if input to ##sar-imm is tagged
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V{
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T{ ##peek f 1 D 0 }
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T{ ##sar-imm f 2 1 3 }
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T{ ##replace f 2 D 0 }
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} 0 test-bb
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[ ] [ test-representations ] unit-test
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[
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V{
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T{ ##peek f 1 D 0 }
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T{ ##sar-imm f 2 1 $[ 3 tag-bits get + ] }
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T{ ##shl-imm f 7 2 $[ tag-bits get ] }
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T{ ##replace f 7 D 0 }
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}
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] [ 0 get instructions>> ] unit-test |