cpu.*: more docs
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@ -73,40 +73,6 @@ init-relocation [ RAX RBX 3 -14 RCX RDX %write-barrier ] B{ } make disassemble
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>>
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>>
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HELP: double-2-rep
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{ $var-description "Representation for a pair of doubles." } ;
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HELP: signed-rep
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{ $values { "rep" representation } { "rep'" representation } }
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{ $description "Maps any representation to its signed counterpart, if it has one." } ;
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HELP: rep-size
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{ $values { "rep" representation } { "n" integer } }
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{ $description "Size in bytes of a representation." } ;
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HELP: immediate-arithmetic?
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{ $values { "n" number } { "?" boolean } }
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{ $description
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"Can this value be an immediate operand for " { $link %add-imm } ", "
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{ $link %sub-imm } ", or " { $link %mul-imm } "?"
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} ;
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HELP: machine-registers
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{ $values { "assoc" assoc } }
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{ $description "Mapping from register class to machine registers. Only registers not reserved by the Factor VM are included." } ;
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HELP: vm-stack-space
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{ $values { "n" number } }
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{ $description "Parameter space to reserve in anything making VM calls." } ;
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HELP: complex-addressing?
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{ $values { "?" boolean } }
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{ $description "Specifies if " { $link %slot } ", " { $link %set-slot } " and " { $link %write-barrier } " accept the 'scale' and 'tag' parameters, and if %load-memory and %store-memory work." } ;
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HELP: param-regs
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{ $values { "abi" "a calling convention symbol" } { "regs" assoc } }
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{ $description "Retrieves the order in which machine registers are used for parameters for the given calling convention." } ;
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HELP: %alien-invoke
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HELP: %alien-invoke
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{ $values
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{ $values
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{ "reg-inputs" sequence }
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{ "reg-inputs" sequence }
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@ -135,6 +101,14 @@ HELP: %allot
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{ $unchecked-example $[ ex-%allot ] }
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{ $unchecked-example $[ ex-%allot ] }
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} ;
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} ;
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HELP: %and-imm
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{ $values
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{ "dst" "destination register" }
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{ "src1" "first source register" }
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{ "src2" "second source register" }
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}
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{ $description "Emits an " { $link AND } " instruction between a register and an immediate." } ;
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HELP: %box
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HELP: %box
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{ $values
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{ $values
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{ "dst" "destination register" }
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{ "dst" "destination register" }
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@ -234,7 +208,7 @@ HELP: %replace-imm
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{ "src" integer }
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{ "src" integer }
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{ "loc" loc }
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{ "loc" loc }
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}
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}
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{ $description "Emits machine code for putting an integer on the stack." }
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{ $description "Emits machine code for putting a literal on the stack." }
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{ $examples
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{ $examples
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{ $unchecked-example
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{ $unchecked-example
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"USING: cpu.architecture make ;"
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"USING: cpu.architecture make ;"
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@ -268,6 +242,14 @@ HELP: %set-slot
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}
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}
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} ;
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} ;
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HELP: %shl-imm
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{ $values
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{ "dst" "register" }
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{ "src1" "register" }
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{ "src2" integer }
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} { $description "Bitshifts the value in a register left by a constant." }
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{ $see-also ##shl-imm } ;
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HELP: %store-memory-imm
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HELP: %store-memory-imm
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{ $values
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{ $values
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{ "value" "source register" }
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{ "value" "source register" }
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@ -285,6 +267,14 @@ HELP: %store-memory-imm
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}
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}
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} ;
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} ;
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HELP: %test-imm-branch
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{ $values
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{ "label" "branch destination" }
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{ "src1" "register" }
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{ "src2" "immediate" }
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{ "cc" "comparison symbol" }
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} { $description "Emits a TEST instruction with a register and an immediate, followed by a branch." } ;
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HELP: %vector>scalar
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HELP: %vector>scalar
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{ $values
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{ $values
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{ "dst" "destination register" }
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{ "dst" "destination register" }
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@ -305,6 +295,39 @@ HELP: %write-barrier
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{ $description "Generates code for the " { $link ##write-barrier } " instruction." }
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{ $description "Generates code for the " { $link ##write-barrier } " instruction." }
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{ $examples { $unchecked-example $[ ex-%write-barrier ] } } ;
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{ $examples { $unchecked-example $[ ex-%write-barrier ] } } ;
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HELP: double-2-rep
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{ $var-description "Representation for a pair of doubles." } ;
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HELP: signed-rep
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{ $values { "rep" representation } { "rep'" representation } }
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{ $description "Maps any representation to its signed counterpart, if it has one." } ;
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HELP: rep-size
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{ $values { "rep" representation } { "n" integer } }
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{ $description "Size in bytes of a representation." } ;
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HELP: immediate-arithmetic?
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{ $values { "n" number } { "?" boolean } }
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{ $description
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"Can this value be an immediate operand for " { $link %add-imm } ", "
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{ $link %sub-imm } ", or " { $link %mul-imm } "?"
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} ;
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HELP: machine-registers
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{ $values { "assoc" assoc } }
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{ $description "Mapping from register class to machine registers. Only registers not reserved by the Factor VM are included." } ;
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HELP: vm-stack-space
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{ $values { "n" number } }
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{ $description "Parameter space to reserve in anything making VM calls." } ;
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HELP: complex-addressing?
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{ $values { "?" boolean } }
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{ $description "Specifies if " { $link %slot } ", " { $link %set-slot } " and " { $link %write-barrier } " accept the 'scale' and 'tag' parameters, and if %load-memory and %store-memory work." } ;
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HELP: param-regs
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{ $values { "abi" "a calling convention symbol" } { "regs" assoc } }
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{ $description "Retrieves the order in which machine registers are used for parameters for the given calling convention." } ;
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HELP: test-instruction?
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HELP: test-instruction?
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{ $values { "?" boolean } }
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{ $values { "?" boolean } }
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{ $description "Does the current architecture have a test instruction? Used on x86 to rewrite some " { $link CMP } " instructions to less expensive " { $link TEST } "s." } ;
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{ $description "Does the current architecture have a test instruction? Used on x86 to rewrite some " { $link CMP } " instructions to less expensive " { $link TEST } "s." } ;
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@ -33,6 +33,14 @@ HELP: MOV
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{ $values { "dst" "destination" } { "src" "source" } }
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{ $values { "dst" "destination" } { "src" "source" } }
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{ $description "Moves a value from one place to another." } ;
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{ $description "Moves a value from one place to another." } ;
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HELP: MOVSX
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{ $values { "dst" "destination" } { "src" "source" } }
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{ $description "Moves a value with sign extension." } ;
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HELP: PEXTRB
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{ $values { "dest" "destination" } { "src" "source" } { "imm" "immediate" } }
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{ $description "Packed extract byte. This instruction copies the byte selected by 'imm' into the first eight bits of the selected register." } ;
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HELP: immediate-1/4
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HELP: immediate-1/4
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{ $values { "dst" "dst" } { "imm" "imm" } { "reg,rex.w,opcode" sequence } }
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{ $values { "dst" "dst" } { "imm" "imm" } { "reg,rex.w,opcode" sequence } }
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{ $description "If imm is a byte, compile the opcode and the byte. Otherwise, set the 8-bit operand flag in the opcode, and compile the cell. The 'reg' is not really a register, but a value for the 'reg' field of the mod-r/m byte." } ;
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{ $description "If imm is a byte, compile the opcode and the byte. Otherwise, set the 8-bit operand flag in the opcode, and compile the cell. The 'reg' is not really a register, but a value for the 'reg' field of the mod-r/m byte." } ;
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@ -44,7 +52,9 @@ HELP: zero-extendable?
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ARTICLE: "cpu.x86.assembler" "X86 assembler"
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ARTICLE: "cpu.x86.assembler" "X86 assembler"
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"This vocab implements an assembler for x86 architectures."
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"This vocab implements an assembler for x86 architectures."
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$nl
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$nl
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"Instructions:"
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"General instructions:"
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{ $subsections MOV } ;
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{ $subsections DEC INC JE MOV MOVSX }
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"SSE instructions:"
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{ $subsections PEXTRB } ;
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ABOUT: "cpu.x86.assembler"
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ABOUT: "cpu.x86.assembler"
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USING: cpu.x86.assembler cpu.x86.assembler.operands.private help.markup
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USING: compiler.cfg.registers cpu.x86.assembler
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help.syntax layouts math ;
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cpu.x86.assembler.operands.private help.markup help.syntax layouts
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math ;
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IN: cpu.x86
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IN: cpu.x86
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HELP: %boolean
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HELP: %boolean
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@ -82,6 +83,10 @@ HELP: load-zone-offset
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}
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}
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} ;
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} ;
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HELP: loc>operand
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{ $values { "loc" loc } { "operand" indirect } }
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{ $description "Converts a stack location to an operand passable to the " { $link MOV } " instruction." } ;
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HELP: store-tagged
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HELP: store-tagged
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{ $values { "dst" "a register symbol" } { "tag" "a builtin class" } }
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{ $values { "dst" "a register symbol" } { "tag" "a builtin class" } }
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{ $description "Tags the register with the tag number for the given class." }
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{ $description "Tags the register with the tag number for the given class." }
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