compiler.cfg.linear-scan.*: stub docs and tests
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@ -130,7 +130,6 @@ SYMBOL: unhandled-intervals
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! Minheap of sync points which still need to be processed
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! Minheap of sync points which still need to be processed
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SYMBOL: unhandled-sync-points
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SYMBOL: unhandled-sync-points
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! Mapping from vregs to spill slots
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SYMBOL: spill-slots
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SYMBOL: spill-slots
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: assign-spill-slot ( coalesced-vreg rep -- spill-slot )
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: assign-spill-slot ( coalesced-vreg rep -- spill-slot )
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@ -7,8 +7,13 @@ HELP: assign-registers-in-insn
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HELP: assign-gc-roots
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HELP: assign-gc-roots
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{ $values { "gc-map" gc-map } }
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{ $values { "gc-map" gc-map } }
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{ $description "Assigns spill slots for all gc roots in a gc map." }
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{ $description "Assigns spill slots for all gc roots in a gc map." } ;
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{ $see-also spill-slot } ;
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HELP: assign-derived-roots
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{ $values { "gc-map" gc-map } }
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{ $description "Assigns pairs of spill slots for all derived roots in a gc map." } ;
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{ assign-gc-roots assign-derived-roots } related-words
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HELP: vreg>reg
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HELP: vreg>reg
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{ $values { "vreg" "virtaul register" } { "reg" "register" } }
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{ $values { "vreg" "virtaul register" } { "reg" "register" } }
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@ -0,0 +1,10 @@
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USING: compiler.cfg.instructions compiler.cfg.linear-scan.assignment
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compiler.cfg.linear-scan.live-intervals cpu.x86.assembler.operands make
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tools.test ;
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IN: compiler.cfg.linear-scan.assignment.tests
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{ { T{ ##spill { src RAX } } } } [
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[
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T{ live-interval-state { vreg 1234 } { reg RAX } } insert-spill
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] { } make
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] unit-test
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@ -31,8 +31,6 @@ SYMBOL: pending-interval-assoc
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vreg>> pending-interval-assoc get delete-at ;
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vreg>> pending-interval-assoc get delete-at ;
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:: vreg>reg ( vreg -- reg )
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:: vreg>reg ( vreg -- reg )
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! If a live vreg is not in the pending set, then it must
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! have been spilled.
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vreg leader :> leader
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vreg leader :> leader
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leader pending-interval-assoc get at* [
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leader pending-interval-assoc get at* [
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drop leader vreg rep-of lookup-spill-slot
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drop leader vreg rep-of lookup-spill-slot
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