Commit Graph

20705 Commits (325df742b04b1cdb320c5cedf88118906b17da1e)

Author SHA1 Message Date
Slava Pestov 325df742b0 cpu.x86.32: clean up %unary/binary-float-function 2010-05-17 04:03:13 -04:00
Slava Pestov ed04758ad6 cpu.x86: get rid of this extra-stack-space nonsense 2010-05-17 02:14:44 -04:00
Slava Pestov 0f5d9d368a compiler.cfg: refactor stack frame code and fix frame pointer usage in callbacks 2010-05-16 21:04:40 -04:00
Joe Groff d70bf5fe60 cuda.devices: factor "context-device cuda-device-properties" into a "context-device-properties" word 2010-05-16 17:16:27 -07:00
Slava Pestov c83c850080 compiler: hack to make XCreateIC() work on x86-64 2010-05-16 04:49:53 -04:00
Slava Pestov 99757a8e0b Merge branch 'master' of git://factorcode.org/git/factor 2010-05-16 04:10:03 -04:00
Slava Pestov 3356661d11 Fixes for FFI changes 2010-05-16 04:09:47 -04:00
Joe Groff 7982bdd8f9 compiler.cfg.intrinsics.simd: use ^^select-vector for simd constant nth when available 2010-05-16 00:50:20 -07:00
Joe Groff bf27af58f4 compiler.cfg.instructions: ##select-vector instruction mapping to SSE4 PEXTR* 2010-05-16 00:50:19 -07:00
Slava Pestov 35bd2bca06 FFI rewrite part 5: return value boxing and callback parameter boxing now uses vregs; simplify return value unboxing 2010-05-16 03:43:23 -04:00
Joe Groff 79f4a59104 compiler.cfg.intrinsics.simd: use new ##gather-int-vector insns to construct int vectors when available 2010-05-15 23:59:27 -07:00
Joe Groff e74b0b2a7b compiler.cfg.instructions: ##gather-int-vector-2/4 instructions that map to SSE4 PINSR/PEXTR 2010-05-15 23:48:22 -07:00
Joe Groff 2566e68f80 cuda.gl.ffi: add missing LIBRARY: cuda befor ffi function defs 2010-05-15 22:33:03 -07:00
Joe Groff 1e938f01cf cuda.gl: enum>number the flags argument to gl-buffer>resource so that single CUDA flag symbols can be used as arguments 2010-05-15 16:26:49 -07:00
Joe Groff 2737a136a9 cpu.x86: fix bootstrap load error 2010-05-15 15:28:22 -07:00
Joe Groff 567ab15274 cuda: move init-cuda from cuda.utils 2010-05-15 15:28:02 -07:00
Joe Groff c93596bb7b cuda.demos.prefix-sum: add init-cuda 2010-05-15 15:01:32 -07:00
Joe Groff 41ba3c9c83 cpu.x86: don't enable bit-count intrinsic by default 2010-05-15 14:52:00 -07:00
Joe Groff ed1ede52af cpu.x86.features: ( int alien-assembly ) c-bool> ==> ( bool alien-assembly ) 2010-05-15 14:33:19 -07:00
Joe Groff c06ebe502e cpu.x86: enable bit-count intrinsic if POPCNT available 2010-05-15 14:00:12 -07:00
Joe Groff ad74f99ec1 compiler.cfg.intrinsics: intrinsic for fixnum-bit-count 2010-05-15 13:59:47 -07:00
Joe Groff b56adf5091 compiler.cfg.instructions: ##bit-count insn 2010-05-15 13:57:35 -07:00
Joe Groff a7de341809 math.bitwise: factor M\ fixnum (bit-count) to a separate word so it can be made intrinsic 2010-05-15 13:27:26 -07:00
Joe Groff 7753198b86 cpu.x86.features: add popcnt? test 2010-05-15 13:26:14 -07:00
Joe Groff 8588f5a4fe cpu.x86.assembler: SETcc instructions 2010-05-15 13:14:27 -07:00
Joe Groff 3b28648fa3 cpu.x86.assembler: BT family instructions 2010-05-15 13:08:22 -07:00
Joe Groff 4d0508a995 opengl.textures: borrow get-texture-float and get-texture-int helper words from gpu.textures 2010-05-15 12:09:50 -07:00
Joe Groff cb589c1f73 cuda: more API cleanups:
- remove useless with-cuda and with-cuda-program combinators
	- eliminate redundant cuda-device, cuda-context variables
	- rearrange arguments of with-*cuda-context to ( device flags quot -- )
	- don't pass context to with-cuda-context quot
	- add context-device word to ask for current device
2010-05-15 11:47:19 -07:00
Slava Pestov 374e928261 compiler.cfg.value-numbering.comparisons: ##test-imm rewrite rule must check that the immediate fits 2010-05-15 03:19:24 -04:00
Joe Groff aeee276044 gpu.buffers: "with-mapped-buffer-array" helper word that wraps a mapped GL buffer in a specialized-array for easy inspection 2010-05-14 16:54:06 -07:00
Joe Groff 9280e545b1 cuda.gl: add free-resource word to release interop handles 2010-05-14 16:17:03 -07:00
Joe Groff 8cbc74ffe1 cuda: add "cuda.gl" vocab with words for cuda/opengl/gpu interop 2010-05-14 16:00:27 -07:00
Joe Groff 4b7ed99982 cuda: in with-cuda-context, sync context when cleaning up so that destroying context doesn't fail due to asynchronous errors 2010-05-14 16:00:27 -07:00
Joe Groff 857a2ff13b gpu.render: allow uchar-array, ushort-array, and uint-array to be passed directly to render as element arrays 2010-05-14 16:00:27 -07:00
Slava Pestov bd55712f82 compiler: fix bad unit test 2010-05-14 18:37:11 -04:00
Slava Pestov 3e68cdb709 cpu.x86.bootstrap: use TEST instruction 2010-05-14 18:37:10 -04:00
Slava Pestov 0dbc9eaae0 compiler.cfg: more silly optimizations 2010-05-14 18:37:09 -04:00
Slava Pestov 210e88b901 compiler.cfg.instructions: change vreg-insn from a mixin into a superclass 2010-05-14 18:37:09 -04:00
Slava Pestov 5ac0252f04 compiler.cfg.linear-scan: pointless optimizations 2010-05-14 18:37:08 -04:00
Slava Pestov b5cde08732 compiler.cfg.ssa.live-ranges: clean up 2010-05-14 18:37:08 -04:00
Slava Pestov b360a4a514 bootstrap.compiler.timing: small update 2010-05-14 18:37:07 -04:00
Slava Pestov 9bb3c0d71b compiler.cfg.alias-analysis: simplify and speed up 2010-05-14 18:37:07 -04:00
Slava Pestov 5a36954a86 compiler.cfg: use x86 TEST instruction to optimize 'bitand 0 =' 2010-05-14 18:37:06 -04:00
Joe Groff f4e10849dd sequences.cords: specialize vshuffle-elements to use vshuffle2-elements on cord components 2010-05-14 13:29:37 -07:00
Joe Groff 40c75a996e math.vectors.simd.intrinsics: fix scalar fallback for (simd-vshuffle2-elements) 2010-05-14 02:47:39 -07:00
Joe Groff 349397e67c math.vectors, math.vectors.simd: add user-facing vshuffle2 word 2010-05-14 02:47:05 -07:00
Joe Groff e96a7a8c5e compiler.cfg.intrinsics.simd: mod shuffle indices for shuffle-2-vectors-imm intrinsic so they wrap like a real instruction would 2010-05-14 01:20:05 -07:00
Joe Groff f202c97b52 math.vectors.simd.intrinsics: (simd-vshuffle2-elements) intrinsic that creates a vector by selecting elements from two input vectors. use ##shuffle-vector-halves-imm to implement for double-2s with SSE 2010-05-14 01:16:29 -07:00
Joe Groff 1c96a37e47 compiler.cfg.instructions: ##shuffle-vector-halves-imm insn to map to SSE's two-input SHUFPS/SHUFPD 2010-05-14 00:20:21 -07:00
Slava Pestov 4ad32f53fe math.vectors.simd.cords: implement new-sequence and like methods on cords to make cross product work 2010-05-13 21:55:19 -04:00