dd691a61e8
break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
2009-10-07 15:27:03 -05:00
f2c9eb79e2
decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
2009-10-07 14:09:46 -05:00
4d5f727a63
sse doesn't actually have an unsigned->unsigned pack instruction
2009-10-07 12:00:31 -05:00
34def34481
don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
2009-10-07 11:59:36 -05:00
879fe9a665
fix x86 %unpack-vector insns
2009-10-06 20:38:51 -05:00
da4cf61014
oops...PACKUSDW is sse4 only
2009-10-06 20:09:50 -05:00
882f40d88e
%float>integer-vector should truncate
2009-10-06 13:57:54 -05:00
529c444e32
add insns for vector pack, unpack, integer>float, and float>integer
2009-10-05 22:34:14 -05:00
b4e36608da
compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
2009-10-05 05:27:49 -05:00
0c9c3d4859
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
04bb03bb61
add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
2009-10-03 11:29:34 -05:00
4e024cbbc2
extend x86 %compare-vector to cover all comparison codes, sometimes stupidly for now
2009-10-02 23:19:56 -05:00
38f413a8a6
add intrinsic for vnot/vbitnot
2009-10-02 20:04:28 -05:00
53b265f682
Merge branch 'master' of git://factorcode.org/git/factor
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Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
f9695951a0
fold test-vector/branch sequences into a test-vector-branch instruction
2009-10-01 19:53:30 -05:00
d14f150b58
%test-vector instruction for vany?, vall?, vnone?
2009-10-01 15:35:38 -05:00
987ced4070
%compare-vector instruction (only does v= for now)
2009-10-01 14:31:37 -05:00
a93f8f66f9
Revert "add a %blend-vector intrinsic for v?"
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This reverts commit 21e4b28b67
2009-09-30 23:40:37 -05:00
67cc45235d
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-30 23:04:04 -05:00
7db7b63552
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
2384b630b2
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
cdc7b7e2c7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
f395d83379
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
e40a95c1e1
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
a8ea929ad9
Work in progress
2009-09-28 17:31:34 -05:00
4202211293
cpu.x86: cleanups
2009-09-28 16:38:35 -05:00
01f526ff28
use PSHUFD for longlong-2 broadcast when dst != src to avoid a %copy
2009-09-28 12:04:08 -05:00
7520da41cc
use MOVDDUP for double-2 broadcast to eliminate a %copy
2009-09-28 12:00:03 -05:00
2e8bb98781
cpu.x86.assembler: make SSE shuffle instructions accept an array of indexes so they're easier to use
2009-09-28 11:45:45 -05:00
965730efbe
SSE integer gather and broadcast
2009-09-28 11:24:08 -05:00
4abfe06b51
Fixing various test failures caused by C type parser change, and clarify C type docs some more
2009-09-28 08:48:39 -05:00
9a06e6f424
math.vectors.simd: add intrinsic for int-4-boa, uint-4-boa, fix tests for C type parser change, fix software fallback for horizontal shifts
2009-09-28 06:34:22 -05:00
08a2eb74f4
cpu.x86: shifts didn't work if dst != src1; re-organize file a bit
2009-09-28 05:39:53 -05:00
7e4b9b6377
cpu.x86: fix regression: fsqrt intrinsic wasn't used
2009-09-28 02:27:55 -05:00
b2ea3afd84
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
59fbe85c9b
compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
2009-09-27 20:36:05 -05:00
f757b454cc
Merge branch 'master' into more_aggressive_coalescing
2009-09-27 19:29:50 -05:00
705b4ab5c3
compiler.cfg.linear-scan: fix partial sync point logic in case where dst == src, and clean up spilling code
2009-09-27 19:28:20 -05:00
91e63c0c6f
cpu.x86.32: implement %unary-float-function and %binary-float-function; speeds up partial-sums and struct-arrays benchmarks
2009-09-27 18:06:30 -05:00
1e841e5086
compiler.cfg.ssa.destruction: more aggressive coalescing work in progress
2009-09-27 17:17:26 -05:00
01a4047126
Merge branch 'slots' of git://factorcode.org/git/factor into slots
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Conflicts:
basis/cpu/x86/x86.factor
2009-09-26 03:12:42 -05:00
7bd330cfd5
Making ##slot and ##set-slot not have a temporary parameter
2009-09-26 00:28:14 -05:00
68f85a69b3
removed param-reg-* HOOKs
2009-09-25 18:58:55 +01:00
4552e02624
made inline_gc a VM_C_API function
2009-09-25 18:29:07 +01:00
f5c70d4ad7
make inline_gc regparm(3) and cleaned up %call-gc stack alignment
2009-09-24 21:45:56 +01:00
1b84f179cd
cpu.x86: don't generate SSE2 instructions if only SSE1 is available
2009-09-24 04:07:15 -05:00
7b6128dd03
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
4ec566b15d
cpu.x86/ppc: unify register-to-register moves using %copy so that better coalescing can eliminate more moves later
2009-09-23 22:49:54 -05:00
dfc9fd071e
Add longlong-2, ulonglong-2, longlong-4, ulonglong-4 SIMD types, fix int-4 multiplication on SSE2
2009-09-23 20:23:25 -05:00
43fa252af5
math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
2009-09-23 02:47:14 -05:00
603a560eaf
cpu.x86: fix using list
2009-09-20 23:24:30 -05:00
9d90bdd439
Fix conflict
2009-09-20 23:18:07 -05:00
ea44ea3522
math.vectors.simd: add saturated arithmetic operations
2009-09-20 23:16:02 -05:00
acea55c692
math.vectors: add v+- word which is accelerated by SSE3
2009-09-20 17:43:16 -05:00
47d8763340
More integer SIMD work
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- move generated vocab support from specialized-arrays to vocabs.generated
- add fuzz testing to math.vectors.simd
- add alien type support for integer SIMD vectors
- SIMD: parsing word generates a SIMD type, instead of pre-generating them all in math.vectors.simd
2009-09-20 16:48:17 -05:00
29c4512066
cpu.x86: cleanup
2009-09-20 04:17:34 -05:00
f8a91438cd
Merge Phil Dawes' VM work
2009-09-20 03:48:08 -05:00
e77341b90c
math.vectors.simd: redesign to be more flexible, integer SIMD work in progress
2009-09-20 02:08:32 -05:00
0bc7c0c1d0
separated vm-1st-arg and vm-3rd-arg asm invoke words (needed for ppc & x86.64)
2009-09-16 08:20:09 +01:00
005549ba43
vm pointer passed to nest_stacks and unnest_stacks (win32)
2009-09-16 08:17:26 +01:00
ff54a57eb3
added code to pass vm ptr to some unboxers
2009-09-16 08:16:32 +01:00
ff8f2b10ec
fixed up getenv compiler intrinsic to use vm struct userenv
2009-09-16 08:16:32 +01:00
5bb04857bf
moved cards_offset and decks_offset into vm struct (for x86)
2009-09-16 08:16:31 +01:00
c010afc345
nursery global variable moved into vm
2009-09-16 08:16:31 +01:00
0be499de8a
renamed to vm-field-offset. Slava's better at naming than me
2009-09-16 08:16:31 +01:00
88d3179358
Added a vm C-STRUCT, using it for struct offsets in x86 asm
2009-09-16 08:16:31 +01:00
9a37b6abb6
moved stack_chain into vm struct
2009-09-16 08:16:31 +01:00
6a193bb0d5
Added %vm-invoke to pass vm ptr to vm functions (x86.32 only, otherwise uses singleton vm)
2009-09-16 08:16:30 +01:00
35b76b83af
convert compiler cpu backends to use c-type words
2009-09-15 16:08:42 -05:00
cd5133b233
cpu.x86: tweak SIMD intrinsics
2009-09-08 22:34:01 -05:00
7e2f0e5dbf
compiler: separate ##save-context instruction from ##alien-invoke, generate a ##save-context for libm calls, and add a pass to combine multiple context saves within a basic block. Fixes crashes with FP traps thrown by libm functions on x86-32
2009-09-08 21:50:55 -05:00
0ea9949e51
split unordered and ordered float comparison intrinsics in compiler; generate only unordered comparisons for now
2009-09-08 17:04:26 -05:00
38c961cf6f
Fixes
2009-09-08 00:13:18 -05:00
bbca00e2ae
Fix conflicts
2009-09-07 23:51:25 -05:00
d47d747ebc
i had comisd/ucomisd backwards on x86
2009-09-04 12:30:30 -05:00
e36a0d7ef4
compiler: clean up code generation for alien boxing/unboxing a bit
2009-09-03 21:22:43 -05:00
c480bec303
convert comparison branch code in compiler to use locals
2009-09-03 21:19:39 -05:00
4d5a4222b6
More SIMD work
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- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
036ff77306
add compiler comparison codes for floating-point unordered comparisons; update x86 backend to generate proper code for all floating-point comparisons
2009-09-03 20:32:05 -05:00
906a0d212a
Detect SSE version and enable the correct set of SIMD intrinsics
2009-09-03 03:28:38 -05:00
ff8c70dbe0
Initial implementation of SSE vector intrinsics:
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- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
85a2bfab6c
compiler: eliminate boilerplate by centralizing info in declarative INSN: syntax
2009-09-02 06:22:37 -05:00
9595be4bf9
%box-displaced-alien: fix clobberage found by Doug
2009-08-30 05:11:08 -05:00
2bb6293217
compiler: add fixnum-min/max intrinsics; ~10% speedup on benchmark.yuv-to-rgb
2009-08-28 19:02:59 -05:00
d957ae4e44
Performance improvements to make struct-arrays benchmark faster
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- improved optimization of ##unbox-any-c-ptr on ##box-displaced-alien; convert it to ##unbox-c-ptr where possible using class info stored in the ##bda instruction
- make fcos, fsin, etc inline again; everything in math.libm inline again, except for fsqrt which is an intrinsic
- convert min and max on floats to float-min and float-max
- make min and max not inline, so that the above can work
- struct-arrays: rice a bit so that more fixnums come up
2009-08-28 05:21:16 -05:00
98f93f799b
cpu.ppc: fix ##box-displaced-alien
2009-08-27 04:43:45 -05:00
f662e6403a
compiler: new inline intrinsic for <displaced-alien> where the inputs have known types; value numbering now eliminates unnecessary allocation of displaced aliens if the result is immediately unboxed again
2009-08-27 00:06:19 -05:00
0df8aadce2
cpu.x86: use SQRTSD instruction for math.libm:fsqrt word
2009-08-25 23:22:15 -05:00
3f3d57032b
Delete empty unit tests files, remove 1- and 1+, reorder IN: lines in a lot of places, minor refactoring
2009-08-13 19:21:44 -05:00
725280d424
Split off the notion of a register representation from a register class
2009-08-07 17:44:50 -05:00
45770c6250
Move a bunch of GC check generation logic to platform-independent side
2009-07-30 21:28:27 -05:00
be363d1a5b
compiler.cfg: Get inline GC checks working again, using a dataflow analysis to compute uninitialized stack locations in compiler.cfg.stacks.uninitialized. Re-enable intrinsics which use inline allocation
2009-07-30 09:19:44 -05:00
d71e2f9577
cpu.x86: Fix shuffle bug. Shuffling bugs occurring in code that runs before optimizer/stack checker is online are only caught at runtime during bootstrap, what a pain
2009-07-30 05:12:40 -05:00
d81dec5d45
cpu.x86: fix a bug in small-register logic on 32-bit. Also, on 32-bit, we don't need to do any special register shuffling to work with 16-bit operands since all registers have 16-bit variants. So now only 8-bit operands on x86-32 require special treatment
2009-07-30 05:04:46 -05:00
8ca17d053c
cpu.x86: use full set of 8-bit, 16-bit and 32-bit registers on x86-64 to avoid clumsy save/restore logic
2009-07-29 21:56:37 -05:00
73862a9a03
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
bfb2a4c1fc
cpu.x86: compile a load of zero, and adds, subs where dst = src1 more efficiently
2009-07-27 22:27:54 -05:00
3fb4fc1bde
Improve code generation for shift word: add intrinsics for fixnum-shift-fast in the case where the shift count is not constant, transform 1 swap shift into a more overflow check with open-coded fast case, transform bitand into fixnum-bitand in more cases
2009-07-16 23:50:48 -05:00
e76dce8aff
Overflowing fixnum intrinsics now expand into several CFG nodes. This speeds up the common case since only the uncommon case is now a stack syncpoint
2009-07-16 18:29:40 -05:00
768e2a5148
compiler.cfg: split off condition codes into a comparisons sub-vocabulary
2009-07-13 14:42:52 -05:00
Joe Groff
Slava Pestov
Slava Pestov
sheeple
Daniel Ehrenberg
Phil Dawes
Doug Coleman