eb802208d1
FFI rewrite part 4: parameter and return value unboxing redesign
2010-05-11 19:11:44 -04:00
4478c3a51a
FFI rewrite part 3: eliminate ##push-context-stack and ##pop-context-stack
2010-05-10 00:46:29 -04:00
7316d41226
FFI rewrite part 2: use ##peek and ##replace instructions to access stack
2010-05-09 23:26:43 -04:00
fec408260e
vm: tweak inline_gc() for PowerPC
2010-05-04 06:52:30 -04:00
dd2a4c2c77
cpu.x86: GC root offsets were computed wrong in words containing alien calls
2010-05-04 02:53:53 -04:00
6c35652666
cpu: cleanups
2010-05-03 23:08:24 -04:00
58e4381eb1
compiler: new "binary literal area" at the end of a word's machine code stores constant floats and SIMD vectors; this allows ##load-reference/##load-memory fusion to be performed on x86-64, with a RIP-relative address reaching the data; also simplifies VM since custom relocation types used by the previous 32-bit-only optimization are no longer needed
2010-05-03 17:34:35 -04:00
428ba9fd0f
compiler.cfg: fuse ##load-integer/##load-reference into ##replace to form ##replace-imm
2010-05-03 17:34:28 -04:00
1b4b66e341
cpu.x86: use available type info to generate more efficient %box-displaced-alien where possible
2010-05-03 17:34:27 -04:00
95ff5ffe51
New GC checks work in progress
2010-05-03 17:34:16 -04:00
a9ccfa8f05
strings: move string-nth primitive out of the VM and into the library
2010-05-03 17:34:12 -04:00
378c2b2a46
compiler.cfg: add ##load-memory and ##store-memory instructions implementing complex addressing modes, and associated value numbering optimizations
2010-05-03 17:34:07 -04:00
2475699736
compiler.cfg: more flexible addressing for ##slot and ##set-slot
2010-05-03 17:34:06 -04:00
6d41d2277f
cpu.x86.assembler: support all addressing modes
2010-05-03 17:34:06 -04:00
913b95192e
compiler.cfg: merge all alien accessors into ##load-memory-imm and ##store-memory-imm
2010-05-03 17:34:06 -04:00
279eb461b1
compiler.cfg: remove ##set-string-nth-fast instruction since it can be expressed just as efficiently using other instructions
2010-05-03 17:34:04 -04:00
5d3a7a7362
Untagged fixnums work in progress
2010-05-03 17:34:02 -04:00
2517b2fc2b
compiler: combine ##load-constant followed by ##alien-double into a ##load-double on x86-32, saving an integer register
2010-04-18 21:42:45 -05:00
8f0739197e
compiler.cfg: fix some bugs introduced by the ##compare-imm fusion patch
2010-04-18 21:42:45 -05:00
2aaf24412a
compiler: change how 'f' is represented in low level IR to simplify some code, and fuse a ##load-constant of a word with a ##compare into a ##compare-imm on x86-32. This eliminates a spill from binary-search
2010-04-18 21:42:45 -05:00
3e0d86f355
Merge branch 'master' of git://factorcode.org/git/factor into abi-symbols
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Conflicts:
basis/compiler/tests/alien.factor
2010-04-06 12:30:15 -07:00
666081f155
update %load-param-reg, %save-param-reg, and %cleanup to take register args into account
2010-04-01 17:36:09 -07:00
eceabbc57e
compiler: new set-special-object intrinsic; more efficient special-object intrinsic
2010-04-01 20:09:14 -04:00
560c119cd2
vm: actually use context callstacks when running code
2010-03-26 22:44:43 -04:00
22fbe01c17
Compiled code size optimizations for x86-64 resulting in development image size reduction of about 350kb
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- RIP-relative LEA is now used to load program counter in prolog and tail calls; saves 3 bytes of code and 4 bytes of relocation information over an immediate MOV
- VM field accesses no longer involve a redundant addition
2010-02-03 23:11:35 +13:00
892522f8bd
alien.c-types: ensure that long and ulong types are defined with define-primitive-type and not typedef
2010-01-23 00:15:08 +13:00
8d34a0f3c1
Store VM object in a register on x86-64
2010-01-11 01:20:32 +13:00
a04b85a45e
cpu.x86: sse_version was renamed to (sse-version)
2010-01-07 18:30:01 +13:00
36d2ac8921
vm: move c_to_factor, lazy_jit_compile_impl, throw_impl, set_callstack assembly routines into non-optimizing compiler for x86-64
2010-01-06 15:47:36 +13:00
ba5b90e063
Change how non-volatile register preservation is done in alien callbacks, with the aim of fixing callbacks on PowerPC, and to eventually eliminate assembly code from VM
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- Simplify calculation of offset in relocation table
- Open-code %alien-callback
- Remove magic_frame hack from context objects
- Move magical return instruction from optimizing compiler backend into callback entry stub
2010-01-03 01:11:51 +13:00
e96404327e
Get optimizing compiler working without global register variables in VM
2009-12-22 15:42:49 +13:00
3e40a36c50
fix simd tests
2009-12-05 17:17:16 -08:00
1c40e4faa4
implement %scalar>integer for longlong reps on x86.64
2009-12-05 15:38:43 -08:00
104c29aabc
simd intrinsic implementation for v*high, v*hs+, vavg, and vsad
2009-12-05 14:52:18 -08:00
63b89c65f9
don't use intrinsics for simd vector element operations when the component size doesn't fit in a fixnum
2009-12-03 12:46:56 -08:00
67cc1c01be
Merge branch 'master' into simd-cleanup
2009-11-26 16:14:46 -08:00
50f7dff422
change name of 'unsign-rep' to more sensible 'signed-rep'
2009-11-24 22:44:12 -08:00
7f546daead
fill in longlong cases for %scalar>integer (won't work on 32bit yet!)
2009-11-19 12:15:24 -08:00
cc194416f9
Merge branch 'master' into startup
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Conflicts:
core/bootstrap/primitives.factor
vm/run.hpp
2009-11-15 02:52:50 -06:00
f544982fda
Merge branch 'master' of git://factorcode.org/git/factor into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-14 21:02:39 -06:00
064c00f78d
New identity-hashcode primitive
2009-11-10 21:18:54 -06:00
75d04922b9
Merge branch 'master' into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-05 11:27:08 -06:00
4d54f27cd1
more intrinsic madness
2009-11-05 09:52:57 -06:00
f6643a1c72
change ##horizontal-add-vector insn to better match what the HADD SSE instructions do (add adjacent pairs, pack results)
2009-11-04 12:18:01 -06:00
2b1a26228b
Align stack pointer on non-Mac OS X x86-32 platforms, and use aligned loads/stores for SIMD values
2009-11-03 23:51:44 -06:00
d655c3c9cc
make horizontal shift available to float vectors (it'd still be faster than the software fallback despite pipeline penalty)
2009-11-03 21:38:29 -06:00
51e9a891a8
cpu.x86: update %box-displaced-alien for introduction of address field
2009-11-03 03:17:43 -06:00
a3b5c07e80
Minor bug fixes for 4-bit tags
2009-11-02 17:41:36 -06:00
e36eb438fa
move all simd intrinsics to compiler.cfg.intrinsics.simd, and only load it when math.vectors.simd is loaded
2009-11-02 15:17:34 -06:00
e4ad642134
vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
2009-11-02 04:25:54 -06:00
f21199005d
Merge branch 'master' into new_gc
2009-11-01 22:17:27 -06:00
aaba25527c
typo in cpu.x86
2009-11-01 19:39:57 -06:00
36e4a141c4
clear destination register before doing CVTS* to break dependency chains
2009-11-01 18:29:12 -06:00
fa8ec06ab5
SSE code generation improvements: always use MOVAPS to move float xmm registers to kill dependency chains, and favor -PS versions of logical, move, and shuffle ops to shrink code size
2009-11-01 16:09:44 -06:00
6f9336c29e
Merge branch 'master' into new_gc
2009-10-30 03:03:05 -05:00
b858860a67
add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
2009-10-30 00:41:19 -05:00
bd13e018dd
memq? -> member-eq?, sorted-memq? -> sorted-member-eq?
2009-10-28 15:02:00 -05:00
3394309659
Merge branch 'master' into new_gc
2009-10-22 05:40:57 -05:00
66dc1c6311
oops, longlong comparison is sse4.2, not 4.1
2009-10-21 23:00:02 -05:00
8a6b0a1453
generate unsigned vector comparison fallbacks using min/max or xor/signed compare
2009-10-20 22:30:57 -05:00
f2b159529c
Merge branch 'master' into startup
2009-10-20 15:01:06 -04:00
d85d84697a
Change data heap alignment to 16 bytes
2009-10-20 12:45:00 -05:00
18be7e1f37
cpu.x86.32: only create 16-byte parameter area if the word calls into the VM
2009-10-20 05:02:42 -05:00
6b6e56a179
change add-init-hook to add-startup-hook, new add-shutdown-hook word
2009-10-19 22:17:02 -04:00
2d5cdd19ec
compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure
2009-10-19 04:58:29 -05:00
6641c530d5
cpu.x86: eliminate 2 instructions form write barrier on x86-32
2009-10-15 22:07:03 -05:00
d3ec94b5c9
cpu.x86: just a cleanup
2009-10-15 05:43:28 -05:00
7d97c19227
compiler: tweak ##write-barrier-imm
2009-10-15 02:40:23 -05:00
38d120f92e
vm: rt-vm relocation now supports accessing a field directly
2009-10-14 19:24:23 -05:00
1ce39963fd
Working on adding support for the new write barrier to optimized code
2009-10-14 02:06:01 -05:00
4e4be60884
use TEST reg, reg to compare integer equality with zero
2009-10-10 13:13:53 -05:00
97ab9dc4ab
only emit ##alien-vector/##set-alien-vector insns if the rep is available
2009-10-10 12:53:10 -05:00
a5898dffde
don't use MOVSLDUP/MOVSHDUP to do specialized shuffles unless sse3 is available
2009-10-10 12:00:47 -05:00
1fa6f32790
fix x86 uchar %scalar>integer
2009-10-10 10:39:23 -05:00
3bc097f6ff
rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
2009-10-09 21:26:27 -05:00
dd691a61e8
break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
2009-10-07 15:27:03 -05:00
f2c9eb79e2
decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
2009-10-07 14:09:46 -05:00
4d5f727a63
sse doesn't actually have an unsigned->unsigned pack instruction
2009-10-07 12:00:31 -05:00
34def34481
don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
2009-10-07 11:59:36 -05:00
879fe9a665
fix x86 %unpack-vector insns
2009-10-06 20:38:51 -05:00
da4cf61014
oops...PACKUSDW is sse4 only
2009-10-06 20:09:50 -05:00
882f40d88e
%float>integer-vector should truncate
2009-10-06 13:57:54 -05:00
529c444e32
add insns for vector pack, unpack, integer>float, and float>integer
2009-10-05 22:34:14 -05:00
b4e36608da
compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
2009-10-05 05:27:49 -05:00
0c9c3d4859
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
04bb03bb61
add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
2009-10-03 11:29:34 -05:00
4e024cbbc2
extend x86 %compare-vector to cover all comparison codes, sometimes stupidly for now
2009-10-02 23:19:56 -05:00
38f413a8a6
add intrinsic for vnot/vbitnot
2009-10-02 20:04:28 -05:00
53b265f682
Merge branch 'master' of git://factorcode.org/git/factor
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Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
f9695951a0
fold test-vector/branch sequences into a test-vector-branch instruction
2009-10-01 19:53:30 -05:00
d14f150b58
%test-vector instruction for vany?, vall?, vnone?
2009-10-01 15:35:38 -05:00
987ced4070
%compare-vector instruction (only does v= for now)
2009-10-01 14:31:37 -05:00
a93f8f66f9
Revert "add a %blend-vector intrinsic for v?"
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This reverts commit 21e4b28b67
2009-09-30 23:40:37 -05:00
67cc45235d
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-30 23:04:04 -05:00
7db7b63552
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
2384b630b2
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
cdc7b7e2c7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
f395d83379
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
e40a95c1e1
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
a8ea929ad9
Work in progress
2009-09-28 17:31:34 -05:00
Slava Pestov
Slava Pestov
Joe Groff
Doug Coleman
Slava Pestov