Slava Pestov
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48e96ef032
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compiler.cfg.scheduling: update to support multiple-output instructions
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2010-07-15 17:38:34 -04:00 |
Slava Pestov
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e27adb2830
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compiler: re-architect low-level optimizer to allow more than one output value per instruction
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2010-07-13 07:40:14 -04:00 |
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Slava Pestov
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a55c8ee671
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FFI rewrite part 6: deconcatenatize
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2010-07-02 15:44:12 -04:00 |
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Slava Pestov
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e86f434f26
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Add GC maps to ##box, ##box-long-long, ##alien-invoke, ##alien-indirect and ##call-gc; remove ##gc-map instruction
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2010-06-14 19:39:46 -04:00 |
Daniel Ehrenberg
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4f66732c36
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Fixing scheduling for compiler changes
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2010-05-04 09:48:16 -05:00 |
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Daniel Ehrenberg
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b02208ceb2
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Some fixes to merge scheduling
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2010-05-03 17:54:46 -05:00 |
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Daniel Ehrenberg
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277705345f
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Merge branch 'master' of git://factorcode.org/git/factor into s3
Conflicts:
basis/compiler/cfg/finalization/finalization.factor
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2010-05-03 17:29:03 -05:00 |
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Slava Pestov
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4352902bb6
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compiler.cfg.empty-blocks: remove unused pass
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2010-05-03 18:23:54 -04:00 |
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Daniel Ehrenberg
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5509604ffe
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Merge branch 'master' into s3
Conflicts:
basis/compiler/cfg/optimizer/optimizer.factor
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2010-05-03 17:19:28 -05:00 |
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Slava Pestov
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f5c5d8b44c
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compiler: remove flat machine representation and generate code directly from the CFG
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2010-05-03 17:34:32 -04:00 |
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Slava Pestov
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43f269e4eb
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Register allocation now uses SSA properties to coalesce values with different representations
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2010-05-03 17:34:20 -04:00 |
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Slava Pestov
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9b34a4a054
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compiler.cfg: remove unused 'reps' slot from compiler.cfg, and re-organize things in preparation for SSA register allocation
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2010-05-03 17:34:18 -04:00 |