7f546daead
fill in longlong cases for %scalar>integer (won't work on 32bit yet!)
2009-11-19 12:15:24 -08:00
cc194416f9
Merge branch 'master' into startup
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Conflicts:
core/bootstrap/primitives.factor
vm/run.hpp
2009-11-15 02:52:50 -06:00
f544982fda
Merge branch 'master' of git://factorcode.org/git/factor into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-14 21:02:39 -06:00
064c00f78d
New identity-hashcode primitive
2009-11-10 21:18:54 -06:00
75d04922b9
Merge branch 'master' into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-05 11:27:08 -06:00
4d54f27cd1
more intrinsic madness
2009-11-05 09:52:57 -06:00
f6643a1c72
change ##horizontal-add-vector insn to better match what the HADD SSE instructions do (add adjacent pairs, pack results)
2009-11-04 12:18:01 -06:00
2b1a26228b
Align stack pointer on non-Mac OS X x86-32 platforms, and use aligned loads/stores for SIMD values
2009-11-03 23:51:44 -06:00
d655c3c9cc
make horizontal shift available to float vectors (it'd still be faster than the software fallback despite pipeline penalty)
2009-11-03 21:38:29 -06:00
51e9a891a8
cpu.x86: update %box-displaced-alien for introduction of address field
2009-11-03 03:17:43 -06:00
a3b5c07e80
Minor bug fixes for 4-bit tags
2009-11-02 17:41:36 -06:00
e36eb438fa
move all simd intrinsics to compiler.cfg.intrinsics.simd, and only load it when math.vectors.simd is loaded
2009-11-02 15:17:34 -06:00
e4ad642134
vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
2009-11-02 04:25:54 -06:00
f21199005d
Merge branch 'master' into new_gc
2009-11-01 22:17:27 -06:00
aaba25527c
typo in cpu.x86
2009-11-01 19:39:57 -06:00
36e4a141c4
clear destination register before doing CVTS* to break dependency chains
2009-11-01 18:29:12 -06:00
fa8ec06ab5
SSE code generation improvements: always use MOVAPS to move float xmm registers to kill dependency chains, and favor -PS versions of logical, move, and shuffle ops to shrink code size
2009-11-01 16:09:44 -06:00
6f9336c29e
Merge branch 'master' into new_gc
2009-10-30 03:03:05 -05:00
b858860a67
add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
2009-10-30 00:41:19 -05:00
bd13e018dd
memq? -> member-eq?, sorted-memq? -> sorted-member-eq?
2009-10-28 15:02:00 -05:00
3394309659
Merge branch 'master' into new_gc
2009-10-22 05:40:57 -05:00
66dc1c6311
oops, longlong comparison is sse4.2, not 4.1
2009-10-21 23:00:02 -05:00
8a6b0a1453
generate unsigned vector comparison fallbacks using min/max or xor/signed compare
2009-10-20 22:30:57 -05:00
f2b159529c
Merge branch 'master' into startup
2009-10-20 15:01:06 -04:00
d85d84697a
Change data heap alignment to 16 bytes
2009-10-20 12:45:00 -05:00
18be7e1f37
cpu.x86.32: only create 16-byte parameter area if the word calls into the VM
2009-10-20 05:02:42 -05:00
6b6e56a179
change add-init-hook to add-startup-hook, new add-shutdown-hook word
2009-10-19 22:17:02 -04:00
2d5cdd19ec
compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure
2009-10-19 04:58:29 -05:00
6641c530d5
cpu.x86: eliminate 2 instructions form write barrier on x86-32
2009-10-15 22:07:03 -05:00
d3ec94b5c9
cpu.x86: just a cleanup
2009-10-15 05:43:28 -05:00
7d97c19227
compiler: tweak ##write-barrier-imm
2009-10-15 02:40:23 -05:00
38d120f92e
vm: rt-vm relocation now supports accessing a field directly
2009-10-14 19:24:23 -05:00
1ce39963fd
Working on adding support for the new write barrier to optimized code
2009-10-14 02:06:01 -05:00
4e4be60884
use TEST reg, reg to compare integer equality with zero
2009-10-10 13:13:53 -05:00
97ab9dc4ab
only emit ##alien-vector/##set-alien-vector insns if the rep is available
2009-10-10 12:53:10 -05:00
a5898dffde
don't use MOVSLDUP/MOVSHDUP to do specialized shuffles unless sse3 is available
2009-10-10 12:00:47 -05:00
1fa6f32790
fix x86 uchar %scalar>integer
2009-10-10 10:39:23 -05:00
3bc097f6ff
rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
2009-10-09 21:26:27 -05:00
dd691a61e8
break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
2009-10-07 15:27:03 -05:00
f2c9eb79e2
decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
2009-10-07 14:09:46 -05:00
4d5f727a63
sse doesn't actually have an unsigned->unsigned pack instruction
2009-10-07 12:00:31 -05:00
34def34481
don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
2009-10-07 11:59:36 -05:00
879fe9a665
fix x86 %unpack-vector insns
2009-10-06 20:38:51 -05:00
da4cf61014
oops...PACKUSDW is sse4 only
2009-10-06 20:09:50 -05:00
882f40d88e
%float>integer-vector should truncate
2009-10-06 13:57:54 -05:00
529c444e32
add insns for vector pack, unpack, integer>float, and float>integer
2009-10-05 22:34:14 -05:00
b4e36608da
compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
2009-10-05 05:27:49 -05:00
0c9c3d4859
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
04bb03bb61
add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
2009-10-03 11:29:34 -05:00
4e024cbbc2
extend x86 %compare-vector to cover all comparison codes, sometimes stupidly for now
2009-10-02 23:19:56 -05:00
38f413a8a6
add intrinsic for vnot/vbitnot
2009-10-02 20:04:28 -05:00
53b265f682
Merge branch 'master' of git://factorcode.org/git/factor
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Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
f9695951a0
fold test-vector/branch sequences into a test-vector-branch instruction
2009-10-01 19:53:30 -05:00
d14f150b58
%test-vector instruction for vany?, vall?, vnone?
2009-10-01 15:35:38 -05:00
987ced4070
%compare-vector instruction (only does v= for now)
2009-10-01 14:31:37 -05:00
a93f8f66f9
Revert "add a %blend-vector intrinsic for v?"
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This reverts commit 21e4b28b67
2009-09-30 23:40:37 -05:00
67cc45235d
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-30 23:04:04 -05:00
7db7b63552
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
2384b630b2
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
cdc7b7e2c7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
f395d83379
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
e40a95c1e1
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
a8ea929ad9
Work in progress
2009-09-28 17:31:34 -05:00
4202211293
cpu.x86: cleanups
2009-09-28 16:38:35 -05:00
01f526ff28
use PSHUFD for longlong-2 broadcast when dst != src to avoid a %copy
2009-09-28 12:04:08 -05:00
7520da41cc
use MOVDDUP for double-2 broadcast to eliminate a %copy
2009-09-28 12:00:03 -05:00
2e8bb98781
cpu.x86.assembler: make SSE shuffle instructions accept an array of indexes so they're easier to use
2009-09-28 11:45:45 -05:00
965730efbe
SSE integer gather and broadcast
2009-09-28 11:24:08 -05:00
4abfe06b51
Fixing various test failures caused by C type parser change, and clarify C type docs some more
2009-09-28 08:48:39 -05:00
9a06e6f424
math.vectors.simd: add intrinsic for int-4-boa, uint-4-boa, fix tests for C type parser change, fix software fallback for horizontal shifts
2009-09-28 06:34:22 -05:00
08a2eb74f4
cpu.x86: shifts didn't work if dst != src1; re-organize file a bit
2009-09-28 05:39:53 -05:00
7e4b9b6377
cpu.x86: fix regression: fsqrt intrinsic wasn't used
2009-09-28 02:27:55 -05:00
b2ea3afd84
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
59fbe85c9b
compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
2009-09-27 20:36:05 -05:00
f757b454cc
Merge branch 'master' into more_aggressive_coalescing
2009-09-27 19:29:50 -05:00
705b4ab5c3
compiler.cfg.linear-scan: fix partial sync point logic in case where dst == src, and clean up spilling code
2009-09-27 19:28:20 -05:00
91e63c0c6f
cpu.x86.32: implement %unary-float-function and %binary-float-function; speeds up partial-sums and struct-arrays benchmarks
2009-09-27 18:06:30 -05:00
1e841e5086
compiler.cfg.ssa.destruction: more aggressive coalescing work in progress
2009-09-27 17:17:26 -05:00
01a4047126
Merge branch 'slots' of git://factorcode.org/git/factor into slots
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Conflicts:
basis/cpu/x86/x86.factor
2009-09-26 03:12:42 -05:00
7bd330cfd5
Making ##slot and ##set-slot not have a temporary parameter
2009-09-26 00:28:14 -05:00
68f85a69b3
removed param-reg-* HOOKs
2009-09-25 18:58:55 +01:00
4552e02624
made inline_gc a VM_C_API function
2009-09-25 18:29:07 +01:00
f5c70d4ad7
make inline_gc regparm(3) and cleaned up %call-gc stack alignment
2009-09-24 21:45:56 +01:00
1b84f179cd
cpu.x86: don't generate SSE2 instructions if only SSE1 is available
2009-09-24 04:07:15 -05:00
7b6128dd03
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
4ec566b15d
cpu.x86/ppc: unify register-to-register moves using %copy so that better coalescing can eliminate more moves later
2009-09-23 22:49:54 -05:00
dfc9fd071e
Add longlong-2, ulonglong-2, longlong-4, ulonglong-4 SIMD types, fix int-4 multiplication on SSE2
2009-09-23 20:23:25 -05:00
43fa252af5
math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
2009-09-23 02:47:14 -05:00
603a560eaf
cpu.x86: fix using list
2009-09-20 23:24:30 -05:00
9d90bdd439
Fix conflict
2009-09-20 23:18:07 -05:00
ea44ea3522
math.vectors.simd: add saturated arithmetic operations
2009-09-20 23:16:02 -05:00
acea55c692
math.vectors: add v+- word which is accelerated by SSE3
2009-09-20 17:43:16 -05:00
47d8763340
More integer SIMD work
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- move generated vocab support from specialized-arrays to vocabs.generated
- add fuzz testing to math.vectors.simd
- add alien type support for integer SIMD vectors
- SIMD: parsing word generates a SIMD type, instead of pre-generating them all in math.vectors.simd
2009-09-20 16:48:17 -05:00
29c4512066
cpu.x86: cleanup
2009-09-20 04:17:34 -05:00
f8a91438cd
Merge Phil Dawes' VM work
2009-09-20 03:48:08 -05:00
e77341b90c
math.vectors.simd: redesign to be more flexible, integer SIMD work in progress
2009-09-20 02:08:32 -05:00
0bc7c0c1d0
separated vm-1st-arg and vm-3rd-arg asm invoke words (needed for ppc & x86.64)
2009-09-16 08:20:09 +01:00
005549ba43
vm pointer passed to nest_stacks and unnest_stacks (win32)
2009-09-16 08:17:26 +01:00
ff54a57eb3
added code to pass vm ptr to some unboxers
2009-09-16 08:16:32 +01:00
ff8f2b10ec
fixed up getenv compiler intrinsic to use vm struct userenv
2009-09-16 08:16:32 +01:00
Joe Groff
Doug Coleman
Slava Pestov
Slava Pestov
sheeple
Daniel Ehrenberg
Phil Dawes