Joe Groff
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75d04922b9
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Merge branch 'master' into simd-cleanup
Conflicts:
basis/math/vectors/simd/functor/functor.factor
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2009-11-05 11:27:08 -06:00 |
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Joe Groff
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4d54f27cd1
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more intrinsic madness
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2009-11-05 09:52:57 -06:00 |
Slava Pestov
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3c4c05e915
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compiler.cfg.intrinsics.allot: fix inline byte array allocation on 32-bit platforms
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2009-11-03 23:44:20 -06:00 |
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Joe Groff
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bd77633d5b
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new intrinsic generators, pt1
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2009-11-03 21:38:45 -06:00 |
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Slava Pestov
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51e9a891a8
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cpu.x86: update %box-displaced-alien for introduction of address field
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2009-11-03 03:17:43 -06:00 |
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Slava Pestov
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91ccc30a54
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Merge branch 'master' into new_gc
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2009-11-02 20:34:13 -06:00 |
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Slava Pestov
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0a15ae4d6b
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compiler.cfg.intrinsics: uncomment line commented out by mistake
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2009-11-02 20:33:14 -06:00 |
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Slava Pestov
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495f776d54
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Merge branch 'master' into new_gc
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2009-11-02 20:11:43 -06:00 |
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Slava Pestov
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8bd2273e44
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compiler.cfg: don't generate useless methods in instruction meta-programming. reduces bootstrap time
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2009-11-02 20:11:29 -06:00 |
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Slava Pestov
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a3b5c07e80
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Minor bug fixes for 4-bit tags
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2009-11-02 17:41:36 -06:00 |
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Joe Groff
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e36eb438fa
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move all simd intrinsics to compiler.cfg.intrinsics.simd, and only load it when math.vectors.simd is loaded
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2009-11-02 15:17:34 -06:00 |
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Slava Pestov
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e4ad642134
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vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
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2009-11-02 04:25:54 -06:00 |
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Joe Groff
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b858860a67
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add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
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2009-10-30 00:41:19 -05:00 |
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Joe Groff
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6e1bffb1c5
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update existing code to use :> ( ) when possible
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2009-10-28 16:11:33 -05:00 |
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Joe Groff
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2ecf3fb568
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fix load errors from bootstrapping
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2009-10-28 12:51:03 -05:00 |
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Joe Groff
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935c0797c3
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update existing code for [let change
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2009-10-27 22:05:37 -05:00 |
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Joe Groff
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8a6b0a1453
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generate unsigned vector comparison fallbacks using min/max or xor/signed compare
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2009-10-20 22:30:57 -05:00 |
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Joe Groff
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cb36111a3c
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generate better fallback code for vmin/vmax intrinsics
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2009-10-20 19:22:38 -05:00 |
Slava Pestov
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2d5cdd19ec
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compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure
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2009-10-19 04:58:29 -05:00 |
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Joe Groff
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448ef2f1d5
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fix unsigned vector unpack
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2009-10-16 14:25:33 -05:00 |
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Slava Pestov
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7d97c19227
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compiler: tweak ##write-barrier-imm
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2009-10-15 02:40:23 -05:00 |
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Slava Pestov
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1ce39963fd
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Working on adding support for the new write barrier to optimized code
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2009-10-14 02:06:01 -05:00 |
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Joe Groff
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97ab9dc4ab
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only emit ##alien-vector/##set-alien-vector insns if the rep is available
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2009-10-10 12:53:10 -05:00 |
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Joe Groff
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d9002127fa
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have vshuffle accept simd-128 variable byte shuffles
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2009-10-10 11:30:11 -05:00 |
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Joe Groff
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3bc097f6ff
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rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
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2009-10-09 21:26:27 -05:00 |
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Joe Groff
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471c86a110
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generate better code for vabs when instruction isn't available instead of using software fallback (-0.0 andn for floats, x > 0 ? x : -x for signed ints, nop for unsigned ints)
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2009-10-09 14:24:55 -05:00 |
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Joe Groff
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01f5d392be
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implement vneg as an intrinsic in terms of load -0, subtract
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2009-10-09 13:16:39 -05:00 |
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Joe Groff
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dd691a61e8
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break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
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2009-10-07 15:27:03 -05:00 |
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Joe Groff
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f2c9eb79e2
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decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
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2009-10-07 14:09:46 -05:00 |
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Joe Groff
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34def34481
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don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
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2009-10-07 11:59:36 -05:00 |
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Joe Groff
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785f8620fd
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glue conversion intrinsics to instructions
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2009-10-06 20:13:38 -05:00 |
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Joe Groff
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fbe810fc3b
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rename SIMD vmerge and kids to (vmerge), make new vmerge more generally useful
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2009-10-05 17:55:39 -05:00 |
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Slava Pestov
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b4e36608da
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compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
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2009-10-05 05:27:49 -05:00 |
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Joe Groff
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0c9c3d4859
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add %merge-vector-head and %merge-vector-tail instructions to back vmerge
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2009-10-03 21:48:53 -05:00 |
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Joe Groff
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04bb03bb61
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add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
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2009-10-03 11:29:34 -05:00 |
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Joe Groff
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38f413a8a6
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add intrinsic for vnot/vbitnot
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2009-10-02 20:04:28 -05:00 |
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Joe Groff
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aa3392e50f
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implement vand, vor, vandn, and vxor as bitwise intrinsics for simd types
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2009-10-02 14:17:01 -05:00 |
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Joe Groff
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53b265f682
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Merge branch 'master' of git://factorcode.org/git/factor
Conflicts:
basis/compiler/codegen/codegen.factor
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2009-10-01 23:14:16 -05:00 |
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Joe Groff
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d14f150b58
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%test-vector instruction for vany?, vall?, vnone?
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2009-10-01 15:35:38 -05:00 |
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Joe Groff
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987ced4070
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%compare-vector instruction (only does v= for now)
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2009-10-01 14:31:37 -05:00 |
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Joe Groff
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a93f8f66f9
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Revert "add a %blend-vector intrinsic for v?"
This reverts commit 21e4b28b67.
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2009-09-30 23:40:37 -05:00 |
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Joe Groff
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67cc45235d
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Merge branch 'master' of git://factorcode.org/git/factor
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2009-09-30 23:04:04 -05:00 |
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Joe Groff
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7db7b63552
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add a %blend-vector intrinsic for v?
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2009-09-30 23:03:59 -05:00 |
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Slava Pestov
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2384b630b2
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math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
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2009-09-30 20:04:37 -05:00 |
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Slava Pestov
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cdc7b7e2c7
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Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
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2009-09-30 05:00:36 -05:00 |
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Slava Pestov
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80e84a357d
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math.vectors.simd: add vbroadcast intrinsic, fix integer overflow issues
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2009-09-29 22:58:20 -05:00 |
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Slava Pestov
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f395d83379
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math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
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2009-09-29 04:48:11 -05:00 |
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Slava Pestov
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e40a95c1e1
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math.vectors.simd: add vshuffle intrinsic
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2009-09-28 23:12:13 -05:00 |
|
Slava Pestov
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a8ea929ad9
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Work in progress
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2009-09-28 17:31:34 -05:00 |
|
Slava Pestov
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b2ea3afd84
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math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
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2009-09-28 02:17:46 -05:00 |