factor

Commit Graph

Author	SHA1	Message	Date
Slava Pestov	4d5a4222b6	More SIMD work - Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array - Make a functor to define 256-bit vector types, use it to define float-8 type - Make SIMD instructions pure-insns so that they participate in value numbering	2009-09-03 20:58:56 -05:00
Doug Coleman	3f3d57032b	Delete empty unit tests files, remove 1- and 1+, reorder IN: lines in a lot of places, minor refactoring	2009-08-13 19:21:44 -05:00
Slava Pestov	24a50c8006	compiler.cfg.two-operand: sometimes we can eliminate a copy in the x = y <op> y case	2009-08-08 20:03:42 -05:00
Slava Pestov	4b7ba38aab	compiler.cfg: virtual registers are integers now, and representations are stored off to the side. Fix bug in representation selection that would manifest if a value was used as a float and a fixnum in different branches; cannot globally unbox float in this case	2009-08-08 04:02:18 -05:00
Slava Pestov	725280d424	Split off the notion of a register representation from a register class	2009-08-07 17:44:50 -05:00
Slava Pestov	370f4c081d	compiler.cfg: convert code into two-operand form before SSA destruction; SSA destruction now operates on a relaxed SSA form where multiple defs of the same vreg are allowed, but only within a single basic block. This makes linear scan's coalescing redundant, allowing it to be removed completely	2009-08-05 18:57:46 -05:00
Slava Pestov	9bde92220b	compiler.cfg.two-operand: if last instruction in a basic block is an overflowing arithmetic op of the form x = y op x, we now convert it correctly. This fixes compiler regression with benchmark.dawes after recent coalescing changes	2009-08-01 23:50:47 -05:00
Slava Pestov	e8cf50ac3e	compiler.cfg.two-operand: make it work in more cases	2009-07-27 22:28:29 -05:00

8 Commits (a5f24c8fb99b4959e3d93c741b2d77d3e9eeb3e7)