daff63071f
Fix the build
2009-09-09 13:44:54 -05:00
cd5133b233
cpu.x86: tweak SIMD intrinsics
2009-09-08 22:34:01 -05:00
7e2f0e5dbf
compiler: separate ##save-context instruction from ##alien-invoke, generate a ##save-context for libm calls, and add a pass to combine multiple context saves within a basic block. Fixes crashes with FP traps thrown by libm functions on x86-32
2009-09-08 21:50:55 -05:00
410d2bf0d0
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-08 19:35:14 -05:00
74fa73aeaf
Fix various test failures
2009-09-08 19:18:56 -05:00
d02d95ea34
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-08 17:05:58 -05:00
0ea9949e51
split unordered and ordered float comparison intrinsics in compiler; generate only unordered comparisons for now
2009-09-08 17:04:26 -05:00
740a175e56
duplicate using
2009-09-08 17:02:31 -05:00
8b6ec8e030
cpu.x86.features: better wording
2009-09-08 14:17:05 -05:00
e5e7c1f725
cpu.x86.features: add -sse-version command-line switch to override SSE detection
2009-09-08 13:56:37 -05:00
38c961cf6f
Fixes
2009-09-08 00:13:18 -05:00
bbca00e2ae
Fix conflicts
2009-09-07 23:51:25 -05:00
d47d747ebc
i had comisd/ucomisd backwards on x86
2009-09-04 12:30:30 -05:00
e36a0d7ef4
compiler: clean up code generation for alien boxing/unboxing a bit
2009-09-03 21:22:43 -05:00
c480bec303
convert comparison branch code in compiler to use locals
2009-09-03 21:19:39 -05:00
4d5a4222b6
More SIMD work
...
- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
036ff77306
add compiler comparison codes for floating-point unordered comparisons; update x86 backend to generate proper code for all floating-point comparisons
2009-09-03 20:32:05 -05:00
3d4c04302a
Merge branch 'master' into simd
2009-09-03 03:45:58 -05:00
906a0d212a
Detect SSE version and enable the correct set of SIMD intrinsics
2009-09-03 03:28:38 -05:00
ff8c70dbe0
Initial implementation of SSE vector intrinsics:
...
- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
102df64ec7
i suck at reading tech docs--those were m64 instructions, not mm instructions
2009-09-02 12:58:35 -05:00
962d560c10
get rid of useless mm->xmm instructions in cpu.x86.assembler, add MOVHLPS and MOVLHPS
2009-09-02 11:06:08 -05:00
85a2bfab6c
compiler: eliminate boilerplate by centralizing info in declarative INSN: syntax
2009-09-02 06:22:37 -05:00
f91b539c31
cpu.ppc: implement fast float function calls; 3x speedup on benchmark.struct-arrays on PowerPC
2009-09-01 15:19:26 -05:00
9595be4bf9
%box-displaced-alien: fix clobberage found by Doug
2009-08-30 05:11:08 -05:00
0db01f6d5f
compiler.cfg.linear-scan now supports partial sync-points where all registers are spilled; taking advantage of this, there are new trigonometric intrinsics which yield a 2x performance boost on benchmark.struct-arrays and a 25% boost on benchmark.partial-sums
2009-08-30 04:52:01 -05:00
2bb6293217
compiler: add fixnum-min/max intrinsics; ~10% speedup on benchmark.yuv-to-rgb
2009-08-28 19:02:59 -05:00
d957ae4e44
Performance improvements to make struct-arrays benchmark faster
...
- improved optimization of ##unbox-any-c-ptr on ##box-displaced-alien; convert it to ##unbox-c-ptr where possible using class info stored in the ##bda instruction
- make fcos, fsin, etc inline again; everything in math.libm inline again, except for fsqrt which is an intrinsic
- convert min and max on floats to float-min and float-max
- make min and max not inline, so that the above can work
- struct-arrays: rice a bit so that more fixnums come up
2009-08-28 05:21:16 -05:00
98f93f799b
cpu.ppc: fix ##box-displaced-alien
2009-08-27 04:43:45 -05:00
f662e6403a
compiler: new inline intrinsic for <displaced-alien> where the inputs have known types; value numbering now eliminates unnecessary allocation of displaced aliens if the result is immediately unboxed again
2009-08-27 00:06:19 -05:00
0df8aadce2
cpu.x86: use SQRTSD instruction for math.libm:fsqrt word
2009-08-25 23:22:15 -05:00
1afd001393
basis/cpu: eliminate some usages of rot
2009-08-25 19:38:48 -05:00
3f3d57032b
Delete empty unit tests files, remove 1- and 1+, reorder IN: lines in a lot of places, minor refactoring
2009-08-13 19:21:44 -05:00
725280d424
Split off the notion of a register representation from a register class
2009-08-07 17:44:50 -05:00
eb3bd1edea
cpu.x86.assembler: make some words private
2009-08-05 18:30:42 -05:00
3258f9c4ef
fix using list on win64
2009-07-31 16:27:18 -05:00
45770c6250
Move a bunch of GC check generation logic to platform-independent side
2009-07-30 21:28:27 -05:00
b43c8b40ac
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 19:11:02 -05:00
b6ddcafcbd
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 11:05:36 -05:00
455956b16c
add additional SSE2 packed integer operations
2009-07-30 11:05:12 -05:00
be363d1a5b
compiler.cfg: Get inline GC checks working again, using a dataflow analysis to compute uninitialized stack locations in compiler.cfg.stacks.uninitialized. Re-enable intrinsics which use inline allocation
2009-07-30 09:19:44 -05:00
cd7a1d6c58
Oopsie
2009-07-30 08:27:52 -05:00
d71e2f9577
cpu.x86: Fix shuffle bug. Shuffling bugs occurring in code that runs before optimizer/stack checker is online are only caught at runtime during bootstrap, what a pain
2009-07-30 05:12:40 -05:00
d81dec5d45
cpu.x86: fix a bug in small-register logic on 32-bit. Also, on 32-bit, we don't need to do any special register shuffling to work with 16-bit operands since all registers have 16-bit variants. So now only 8-bit operands on x86-32 require special treatment
2009-07-30 05:04:46 -05:00
a9977d7c79
cpu.x86: update non-optimizing compiler backends for assembler vocab split
2009-07-30 02:22:37 -05:00
1e8d13c1f1
cpu.x86.assembler: fix extended 8-bit registers (DIL, SIL, SPL, BPL)
2009-07-29 22:32:22 -05:00
8ca17d053c
cpu.x86: use full set of 8-bit, 16-bit and 32-bit registers on x86-64 to avoid clumsy save/restore logic
2009-07-29 21:56:37 -05:00
73862a9a03
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
09d89c0d17
Merge branch 'dcn'
2009-07-28 12:37:45 -05:00
9f3c8a9959
SSE4 opcodes for x86 assembler
2009-07-28 12:19:37 -05:00
Slava Pestov
Doug Coleman
Joe Groff
Slava Pestov
sheeple
Slava Pestov