9b34a4a054
compiler.cfg: remove unused 'reps' slot from compiler.cfg, and re-organize things in preparation for SSA register allocation
2010-05-03 17:34:18 -04:00
0f5d9974a0
compiler.cfg.representations: fix various bugs
2010-05-03 17:34:11 -04:00
456743a6ce
compiler.cfg.representations: add more peephole optimizations to reduce fixnum tagging and untagging overhead
2010-05-03 17:34:11 -04:00
e95cd256ec
compiler.cfg.representations: peephole optimizations are used to simplify the case where the input to a ##shl-imm or ##sar-imm needs to be untagged
2010-05-03 17:34:03 -04:00
503c0fcfde
compiler: Start using tagged-rep for stuff, and split up compiler.cfg.representations into several sub-vocabularies
2010-05-03 17:34:01 -04:00
2517b2fc2b
compiler: combine ##load-constant followed by ##alien-double into a ##load-double on x86-32, saving an integer register
2010-04-18 21:42:45 -05:00
512fe14e4e
Merge branch 'bags' of git://github.com/littledan/Factor
...
Conflicts:
basis/compiler/cfg/ssa/construction/tdmsc/tdmsc.factor
basis/furnace/auth/auth.factor
basis/stack-checker/backend/backend.factor
2010-03-16 13:28:00 -04:00
191ac353fd
generalize stack effects so we can bootstrap with the stricter stack effect checking
2010-03-08 23:38:10 -08:00
7074979745
Moving new-sets to sets
2010-02-26 16:01:01 -05:00
e4ad642134
vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
2009-11-02 04:25:54 -06:00
1476cdb974
reverse-here -> reverse!
2009-10-28 14:40:15 -05:00
fd6f370119
typo in convert-to-fill-vector?
2009-10-07 12:53:10 -05:00
ea051063a4
convert all-ones vector ##load-reference/##load-constant to a ##fill-vector insn
2009-10-07 12:35:21 -05:00
c3d81cefe9
compiler.cfg: don't unbox the same value more than once per basic block
2009-10-01 19:41:23 -05:00
b9577e2b0e
compiler.cfg.instructions: remove ##box-float, ##unbox-float, ##box-vector, ##unbox-vector since they can be expressed in terms of ##alien-double, ##set-alien-double, ##alien-vector, ##set-alien-vector, and ##allot
2009-10-01 18:07:50 -05:00
cdc7b7e2c7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
1da18d06b1
compiler.cfg.value-numbering: add some more rewrite rules, neg/neg, not/not, and a few for SIMD
2009-09-30 02:18:29 -05:00
7b6128dd03
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
e11d1e37f5
math.vectors.simd: allow punning SIMD vectors between types
2009-09-04 02:35:58 -05:00
4d5a4222b6
More SIMD work
...
- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
ff8c70dbe0
Initial implementation of SSE vector intrinsics:
...
- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
55acddef3f
compiler.cfg.representation: OK to unbox output of ##load-reference globally
2009-08-08 20:03:13 -05:00
d0c393aa60
compiler.cfg: new system to track when results of analyses need to be recomputed (reverse post order, linear order, predecessors, dominance, loops). Passes can now call needs-predecessors, needs-dominance, needs-loops at the beginning, and cfg-changed, predecessors-changd at the end. Linearization order now takes loop nesting into account, and linear scan now uses linearization order instead of RPO.
2009-08-08 20:02:56 -05:00
1bf8a0cac7
compiler.cfg.representations: emit-conversion should not be private since CSSA construction uses it
2009-08-08 04:13:30 -05:00
4b7ba38aab
compiler.cfg: virtual registers are integers now, and representations are stored off to the side. Fix bug in representation selection that would manifest if a value was used as a float and a fixnum in different branches; cannot globally unbox float in this case
2009-08-08 04:02:18 -05:00
e21ca289c3
compiler.cfg.representations: new pass to make global unboxing decisions, relies on new compiler.cfg.loop-detection pass for loop nesting information
2009-08-08 00:24:46 -05:00
Slava Pestov
Daniel Ehrenberg
Joe Groff
Doug Coleman
Slava Pestov