Slava Pestov
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36d2ac8921
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vm: move c_to_factor, lazy_jit_compile_impl, throw_impl, set_callstack assembly routines into non-optimizing compiler for x86-64
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2010-01-06 15:47:36 +13:00 |
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Slava Pestov
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ba5b90e063
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Change how non-volatile register preservation is done in alien callbacks, with the aim of fixing callbacks on PowerPC, and to eventually eliminate assembly code from VM
- Simplify calculation of offset in relocation table
- Open-code %alien-callback
- Remove magic_frame hack from context objects
- Move magical return instruction from optimizing compiler backend into callback entry stub
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2010-01-03 01:11:51 +13:00 |
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Slava Pestov
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e96404327e
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Get optimizing compiler working without global register variables in VM
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2009-12-22 15:42:49 +13:00 |
Joe Groff
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104c29aabc
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simd intrinsic implementation for v*high, v*hs+, vavg, and vsad
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2009-12-05 14:52:18 -08:00 |
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Slava Pestov
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7c8d755c45
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Fix bootstrap
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2009-12-02 19:24:46 -05:00 |
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Joe Groff
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50f7dff422
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change name of 'unsign-rep' to more sensible 'signed-rep'
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2009-11-24 22:44:12 -08:00 |
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Joe Groff
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d94ffe6d78
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scalar fallbacks for simd intrinsics
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2009-11-23 21:24:55 -08:00 |
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Joe Groff
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152b0d2df5
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break simd intrinsics into a separate vocab so they can be intrinsified before the simd methods compile
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2009-11-19 11:53:46 -08:00 |
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Joe Groff
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6583875055
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tests for all simd intrinsics
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2009-11-18 18:20:58 -08:00 |
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Joe Groff
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75d04922b9
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Merge branch 'master' into simd-cleanup
Conflicts:
basis/math/vectors/simd/functor/functor.factor
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2009-11-05 11:27:08 -06:00 |
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Joe Groff
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f6643a1c72
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change ##horizontal-add-vector insn to better match what the HADD SSE instructions do (add adjacent pairs, pack results)
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2009-11-04 12:18:01 -06:00 |
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Slava Pestov
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51e9a891a8
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cpu.x86: update %box-displaced-alien for introduction of address field
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2009-11-03 03:17:43 -06:00 |
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Joe Groff
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b858860a67
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add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
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2009-10-30 00:41:19 -05:00 |
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Slava Pestov
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1e7893b6ce
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compiler: FFI is now slightly more efficient when unboxing parameters, only changes data stack height once
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2009-10-20 04:31:48 -05:00 |
Slava Pestov
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2d5cdd19ec
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compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure
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2009-10-19 04:58:29 -05:00 |
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Slava Pestov
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1ce39963fd
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Working on adding support for the new write barrier to optimized code
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2009-10-14 02:06:01 -05:00 |
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Joe Groff
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97ab9dc4ab
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only emit ##alien-vector/##set-alien-vector insns if the rep is available
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2009-10-10 12:53:10 -05:00 |
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Joe Groff
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3bc097f6ff
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rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
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2009-10-09 21:26:27 -05:00 |
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Slava Pestov
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9357ee378e
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cpu.architecture: move dummy -reps words here, from cpu.ppc
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2009-10-08 03:48:03 -05:00 |
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Joe Groff
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dd691a61e8
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break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
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2009-10-07 15:27:03 -05:00 |
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Joe Groff
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f2c9eb79e2
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decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
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2009-10-07 14:09:46 -05:00 |
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Joe Groff
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879fe9a665
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fix x86 %unpack-vector insns
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2009-10-06 20:38:51 -05:00 |
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Joe Groff
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529c444e32
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add insns for vector pack, unpack, integer>float, and float>integer
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2009-10-05 22:34:14 -05:00 |
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Slava Pestov
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b4e36608da
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compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
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2009-10-05 05:27:49 -05:00 |
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Joe Groff
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0c9c3d4859
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add %merge-vector-head and %merge-vector-tail instructions to back vmerge
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2009-10-03 21:48:53 -05:00 |
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Joe Groff
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04bb03bb61
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add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
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2009-10-03 11:29:34 -05:00 |
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Joe Groff
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4e024cbbc2
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extend x86 %compare-vector to cover all comparison codes, sometimes stupidly for now
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2009-10-02 23:19:56 -05:00 |
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Joe Groff
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38f413a8a6
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add intrinsic for vnot/vbitnot
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2009-10-02 20:04:28 -05:00 |
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Joe Groff
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53b265f682
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Merge branch 'master' of git://factorcode.org/git/factor
Conflicts:
basis/compiler/codegen/codegen.factor
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2009-10-01 23:14:16 -05:00 |
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Joe Groff
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f9695951a0
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fold test-vector/branch sequences into a test-vector-branch instruction
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2009-10-01 19:53:30 -05:00 |
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Joe Groff
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d14f150b58
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%test-vector instruction for vany?, vall?, vnone?
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2009-10-01 15:35:38 -05:00 |
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Joe Groff
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987ced4070
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%compare-vector instruction (only does v= for now)
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2009-10-01 14:31:37 -05:00 |
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Joe Groff
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a93f8f66f9
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Revert "add a %blend-vector intrinsic for v?"
This reverts commit 21e4b28b67.
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2009-09-30 23:40:37 -05:00 |
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Joe Groff
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7db7b63552
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add a %blend-vector intrinsic for v?
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2009-09-30 23:03:59 -05:00 |
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Slava Pestov
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cdc7b7e2c7
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Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
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2009-09-30 05:00:36 -05:00 |
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Slava Pestov
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f395d83379
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math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
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2009-09-29 04:48:11 -05:00 |
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Slava Pestov
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a8ea929ad9
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Work in progress
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2009-09-28 17:31:34 -05:00 |
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Slava Pestov
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b2ea3afd84
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math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
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2009-09-28 02:17:46 -05:00 |
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Slava Pestov
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59fbe85c9b
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compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
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2009-09-27 20:36:05 -05:00 |
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Slava Pestov
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f757b454cc
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Merge branch 'master' into more_aggressive_coalescing
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2009-09-27 19:29:50 -05:00 |
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Slava Pestov
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705b4ab5c3
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compiler.cfg.linear-scan: fix partial sync point logic in case where dst == src, and clean up spilling code
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2009-09-27 19:28:20 -05:00 |
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Slava Pestov
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1e841e5086
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compiler.cfg.ssa.destruction: more aggressive coalescing work in progress
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2009-09-27 17:17:26 -05:00 |
sheeple
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01a4047126
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Merge branch 'slots' of git://factorcode.org/git/factor into slots
Conflicts:
basis/cpu/x86/x86.factor
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2009-09-26 03:12:42 -05:00 |
Daniel Ehrenberg
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51f2bbd74b
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Completing slot and set-slot changes on x86
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2009-09-26 01:39:48 -05:00 |
Phil Dawes
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d457df1fbf
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moved %(un)nest-stacks out to cpu specific files to eliminate %vm-invoke from compiler.codegen
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2009-09-25 19:32:08 +01:00 |
|
Phil Dawes
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28420c587a
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isolated %vm-invoke-blah-arg crap to 64.factor
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2009-09-25 19:02:41 +01:00 |
|
Phil Dawes
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a07a2f7496
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compiler.codegen passes temp reg to %call-gc
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2009-09-25 18:48:13 +01:00 |
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Slava Pestov
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7b6128dd03
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math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
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2009-09-24 03:32:39 -05:00 |
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Slava Pestov
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dfc9fd071e
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Add longlong-2, ulonglong-2, longlong-4, ulonglong-4 SIMD types, fix int-4 multiplication on SSE2
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2009-09-23 20:23:25 -05:00 |
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Slava Pestov
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43fa252af5
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math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
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2009-09-23 02:47:14 -05:00 |