Slava Pestov
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a2b982e247
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compiler.cfg.builder: don't make basic blocks after terminating calls
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2009-05-25 19:16:36 -05:00 |
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Slava Pestov
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e58fcd485c
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Working on global optimizations
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2009-05-19 17:28:13 -05:00 |
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Slava Pestov
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cddb1f6133
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Fix spelling
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2009-02-15 04:07:05 -06:00 |
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Slava Pestov
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1c0789e616
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Didn't generate ##branch after ##alien-invoke and ##alien-indirect
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2008-11-29 03:46:57 -06:00 |
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Slava Pestov
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f44506089d
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More work on overflow instructions: don't need temp register anymore, add -tail variants which don't need stack frame
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2008-11-28 06:36:30 -06:00 |
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Slava Pestov
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eb05dd3a12
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Optimize a ##dispatch that is applied to the result of a ##sub-imm or ##add-imm; this eliminates an instruction from the common 1 fixnum-fast { ... } dispatch and 8 fixnum-fast { ... } dispatch code sequences appearing in generic word expansions
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2008-11-13 04:16:08 -06:00 |
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Slava Pestov
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26f309d2ae
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Trying to make PEGs compile faster by reducing the number of low level IR nodes: merge functionality of #>r and #r> into #shuffle, and generate 1 node instead of 3 for calls to get-local
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2008-11-11 18:46:31 -06:00 |
sheeple
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5b7d40d9b4
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We need to end the basic block after the ##prologue in the dispatch branch so that the GC check can go after the prologue
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2008-11-10 02:58:05 -06:00 |
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Slava Pestov
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4e55cd973b
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If a #dispatch branch is a call to another word which is not an intrinsic, we avoid generating the dispatch branch and just jump to the word directly
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2008-11-06 11:48:55 -06:00 |
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Slava Pestov
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1c1333fbe9
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Compile not and >boolean as branchless intrinsics by having the CFG builder detect certain code patterns
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2008-11-06 09:09:21 -06:00 |
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Slava Pestov
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59f4f25b91
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Loop alignment: appears to be a small win for reverse-complement
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2008-11-03 06:20:51 -06:00 |
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Slava Pestov
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445e353337
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Optimize away useless jumps
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2008-11-02 23:09:31 -06:00 |
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Slava Pestov
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804c6f93ea
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Fix x86.32
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2008-10-31 21:07:41 -05:00 |
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Slava Pestov
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73d01452cb
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Replace ##gc with a gc flag in the basic block
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2008-10-22 18:38:30 -05:00 |
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Slava Pestov
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1b06ab1b39
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Fixing various bugs
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2008-10-21 23:17:32 -05:00 |
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Slava Pestov
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94a2bfa2ea
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Working on comparison operations, clearing out remaining dead wood
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2008-10-21 03:20:48 -05:00 |
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Slava Pestov
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e92f795a76
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More work on intrinsics; memory allocation and slot access now expands correctly
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2008-10-20 20:40:15 -05:00 |
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Slava Pestov
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37cf7d9a9c
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Add SSA comparison instructions, fix various problems
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2008-10-20 05:55:20 -05:00 |
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Slava Pestov
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f092622fac
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CFG IR is now pure SSA
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2008-10-20 01:56:28 -05:00 |
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Slava Pestov
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c0d89b061e
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Fixing register allocator prspilling
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2008-10-19 01:10:21 -05:00 |
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Slava Pestov
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239578353f
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Simplifying vregs work in progress
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2008-10-17 15:35:04 -05:00 |
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Slava Pestov
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ae3c4ae1b6
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Fix some problems with callbacks
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2008-10-12 23:32:14 -05:00 |
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Slava Pestov
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b2ade7f556
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Fix callbacks and non-tailcalls to dispatch
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2008-10-12 17:37:26 -05:00 |
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Slava Pestov
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5f93ab74e4
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Fix #dispatch generation
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2008-10-12 16:46:59 -05:00 |
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Slava Pestov
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3844cb62d8
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Fix %write-barrier
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2008-10-10 03:16:26 -05:00 |
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Slava Pestov
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3e29808f17
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Fix loop compilation
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2008-10-10 02:33:32 -05:00 |
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Slava Pestov
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cf46a832e7
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Debugging register allocator and inline allocation
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2008-10-08 23:42:53 -05:00 |
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Slava Pestov
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0e4e05d5cd
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Debugging new codegen
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2008-10-08 03:51:44 -05:00 |
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Slava Pestov
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7b6d9c4c4f
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Debugging new codegen
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2008-10-07 20:00:38 -05:00 |
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Slava Pestov
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f436fd0c0f
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Merging in new codegen
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2008-10-07 16:16:50 -05:00 |