529c444e32
add insns for vector pack, unpack, integer>float, and float>integer
2009-10-05 22:34:14 -05:00
b4e36608da
compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
2009-10-05 05:27:49 -05:00
0c9c3d4859
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
04bb03bb61
add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
2009-10-03 11:29:34 -05:00
4e024cbbc2
extend x86 %compare-vector to cover all comparison codes, sometimes stupidly for now
2009-10-02 23:19:56 -05:00
38f413a8a6
add intrinsic for vnot/vbitnot
2009-10-02 20:04:28 -05:00
53b265f682
Merge branch 'master' of git://factorcode.org/git/factor
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Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
f9695951a0
fold test-vector/branch sequences into a test-vector-branch instruction
2009-10-01 19:53:30 -05:00
d14f150b58
%test-vector instruction for vany?, vall?, vnone?
2009-10-01 15:35:38 -05:00
987ced4070
%compare-vector instruction (only does v= for now)
2009-10-01 14:31:37 -05:00
a93f8f66f9
Revert "add a %blend-vector intrinsic for v?"
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This reverts commit 21e4b28b67
2009-09-30 23:40:37 -05:00
67cc45235d
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-30 23:04:04 -05:00
7db7b63552
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
2384b630b2
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
cdc7b7e2c7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
f395d83379
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
e40a95c1e1
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
a8ea929ad9
Work in progress
2009-09-28 17:31:34 -05:00
4202211293
cpu.x86: cleanups
2009-09-28 16:38:35 -05:00
01f526ff28
use PSHUFD for longlong-2 broadcast when dst != src to avoid a %copy
2009-09-28 12:04:08 -05:00
7520da41cc
use MOVDDUP for double-2 broadcast to eliminate a %copy
2009-09-28 12:00:03 -05:00
2e8bb98781
cpu.x86.assembler: make SSE shuffle instructions accept an array of indexes so they're easier to use
2009-09-28 11:45:45 -05:00
965730efbe
SSE integer gather and broadcast
2009-09-28 11:24:08 -05:00
4abfe06b51
Fixing various test failures caused by C type parser change, and clarify C type docs some more
2009-09-28 08:48:39 -05:00
9a06e6f424
math.vectors.simd: add intrinsic for int-4-boa, uint-4-boa, fix tests for C type parser change, fix software fallback for horizontal shifts
2009-09-28 06:34:22 -05:00
08a2eb74f4
cpu.x86: shifts didn't work if dst != src1; re-organize file a bit
2009-09-28 05:39:53 -05:00
7e4b9b6377
cpu.x86: fix regression: fsqrt intrinsic wasn't used
2009-09-28 02:27:55 -05:00
b2ea3afd84
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
59fbe85c9b
compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
2009-09-27 20:36:05 -05:00
f757b454cc
Merge branch 'master' into more_aggressive_coalescing
2009-09-27 19:29:50 -05:00
705b4ab5c3
compiler.cfg.linear-scan: fix partial sync point logic in case where dst == src, and clean up spilling code
2009-09-27 19:28:20 -05:00
91e63c0c6f
cpu.x86.32: implement %unary-float-function and %binary-float-function; speeds up partial-sums and struct-arrays benchmarks
2009-09-27 18:06:30 -05:00
1e841e5086
compiler.cfg.ssa.destruction: more aggressive coalescing work in progress
2009-09-27 17:17:26 -05:00
01a4047126
Merge branch 'slots' of git://factorcode.org/git/factor into slots
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Conflicts:
basis/cpu/x86/x86.factor
2009-09-26 03:12:42 -05:00
7bd330cfd5
Making ##slot and ##set-slot not have a temporary parameter
2009-09-26 00:28:14 -05:00
68f85a69b3
removed param-reg-* HOOKs
2009-09-25 18:58:55 +01:00
4552e02624
made inline_gc a VM_C_API function
2009-09-25 18:29:07 +01:00
f5c70d4ad7
make inline_gc regparm(3) and cleaned up %call-gc stack alignment
2009-09-24 21:45:56 +01:00
1b84f179cd
cpu.x86: don't generate SSE2 instructions if only SSE1 is available
2009-09-24 04:07:15 -05:00
7b6128dd03
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
4ec566b15d
cpu.x86/ppc: unify register-to-register moves using %copy so that better coalescing can eliminate more moves later
2009-09-23 22:49:54 -05:00
dfc9fd071e
Add longlong-2, ulonglong-2, longlong-4, ulonglong-4 SIMD types, fix int-4 multiplication on SSE2
2009-09-23 20:23:25 -05:00
43fa252af5
math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
2009-09-23 02:47:14 -05:00
603a560eaf
cpu.x86: fix using list
2009-09-20 23:24:30 -05:00
9d90bdd439
Fix conflict
2009-09-20 23:18:07 -05:00
ea44ea3522
math.vectors.simd: add saturated arithmetic operations
2009-09-20 23:16:02 -05:00
acea55c692
math.vectors: add v+- word which is accelerated by SSE3
2009-09-20 17:43:16 -05:00
47d8763340
More integer SIMD work
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- move generated vocab support from specialized-arrays to vocabs.generated
- add fuzz testing to math.vectors.simd
- add alien type support for integer SIMD vectors
- SIMD: parsing word generates a SIMD type, instead of pre-generating them all in math.vectors.simd
2009-09-20 16:48:17 -05:00
29c4512066
cpu.x86: cleanup
2009-09-20 04:17:34 -05:00
f8a91438cd
Merge Phil Dawes' VM work
2009-09-20 03:48:08 -05:00
Joe Groff
Slava Pestov
Slava Pestov
sheeple
Daniel Ehrenberg
Phil Dawes