61fe034e3e
cpu.ppc: put spill slots and GC roots in stack frame where subroutine calls can't clobber them
2009-07-31 23:47:07 -05:00
9a80fdb81b
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-31 17:59:00 -05:00
957a5b7b9b
cpu.ppc: fix small typos
2009-07-31 17:57:15 -05:00
3258f9c4ef
fix using list on win64
2009-07-31 16:27:18 -05:00
dd2dc2bb24
cpu.ppc: Updating PowerPC backend for codegen changes over the last two months: new shift intrinsics added, fixnum overflow intrinsics are now treated like conditionals, GC checks are more complex and have a different API
2009-07-30 21:44:22 -05:00
45770c6250
Move a bunch of GC check generation logic to platform-independent side
2009-07-30 21:28:27 -05:00
b43c8b40ac
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 19:11:02 -05:00
b6ddcafcbd
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 11:05:36 -05:00
455956b16c
add additional SSE2 packed integer operations
2009-07-30 11:05:12 -05:00
be363d1a5b
compiler.cfg: Get inline GC checks working again, using a dataflow analysis to compute uninitialized stack locations in compiler.cfg.stacks.uninitialized. Re-enable intrinsics which use inline allocation
2009-07-30 09:19:44 -05:00
cd7a1d6c58
Oopsie
2009-07-30 08:27:52 -05:00
d71e2f9577
cpu.x86: Fix shuffle bug. Shuffling bugs occurring in code that runs before optimizer/stack checker is online are only caught at runtime during bootstrap, what a pain
2009-07-30 05:12:40 -05:00
d81dec5d45
cpu.x86: fix a bug in small-register logic on 32-bit. Also, on 32-bit, we don't need to do any special register shuffling to work with 16-bit operands since all registers have 16-bit variants. So now only 8-bit operands on x86-32 require special treatment
2009-07-30 05:04:46 -05:00
a9977d7c79
cpu.x86: update non-optimizing compiler backends for assembler vocab split
2009-07-30 02:22:37 -05:00
1e8d13c1f1
cpu.x86.assembler: fix extended 8-bit registers (DIL, SIL, SPL, BPL)
2009-07-29 22:32:22 -05:00
8ca17d053c
cpu.x86: use full set of 8-bit, 16-bit and 32-bit registers on x86-64 to avoid clumsy save/restore logic
2009-07-29 21:56:37 -05:00
73862a9a03
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
09d89c0d17
Merge branch 'dcn'
2009-07-28 12:37:45 -05:00
9f3c8a9959
SSE4 opcodes for x86 assembler
2009-07-28 12:19:37 -05:00
4175585fd4
Merge branch 'master' into dcn
2009-07-28 11:20:43 -05:00
5372113fce
SSE1–SSSE3 opcodes + branch hints for x86 assembler
2009-07-28 00:22:27 -05:00
bfb2a4c1fc
cpu.x86: compile a load of zero, and adds, subs where dst = src1 more efficiently
2009-07-27 22:27:54 -05:00
3fb4fc1bde
Improve code generation for shift word: add intrinsics for fixnum-shift-fast in the case where the shift count is not constant, transform 1 swap shift into a more overflow check with open-coded fast case, transform bitand into fixnum-bitand in more cases
2009-07-16 23:50:48 -05:00
e76dce8aff
Overflowing fixnum intrinsics now expand into several CFG nodes. This speeds up the common case since only the uncommon case is now a stack syncpoint
2009-07-16 18:29:40 -05:00
768e2a5148
compiler.cfg: split off condition codes into a comparisons sub-vocabulary
2009-07-13 14:42:52 -05:00
1157f58f37
cpu.x86.32: don't emit sub %esp,0x0 in prologue on Linux and Windows
2009-07-01 18:13:45 -05:00
4db44cd23f
%dispatch: sometimes the generated sequence is one byte longer, so instead of hard-coding it, compute the right length
2009-06-30 18:11:15 -05:00
fc6c9e2dfd
cpu.x86: don't clobber src in %dispatch
2009-06-30 16:47:22 -05:00
45a2105449
cpu.x86.assembler: IMUL2 instruction was busted for immediate operands
...
When given a register and an immediate, it would generate imul imm,dst,dst however the 64-bit prefix was generated wrong and if dst was an extended register only the first operand would be an extended register. To fix this, change IMUL2 to not work on immediates anymore, and added a new IMUL3 that takes a destination register, source register, and immediate. Also, change compiler.cfg.two-operand to not two-operandize %mul-imm, since this isn't needed anymore.
This fixes the sporadic benchmark.tuple-arrays crash on 64-bit machines.
2009-06-08 21:15:52 -05:00
9ad9600764
Remove %dispatch-label since its tehe same on all platforms; fix %gc on PowerPC
2009-06-07 21:46:28 -05:00
49f670be05
Fix 32-bit bootstrap
2009-06-03 03:23:55 -05:00
ade5db2405
cpu.x86: fix small register intrinsics on x86-64
2009-06-03 03:22:46 -05:00
2d231f066a
GC checks now save and restore registers
2009-06-02 18:23:47 -05:00
9e987e8642
Merge branch 'master' into global_optimization
2009-06-01 03:12:32 -05:00
b389dcf441
Redo compiler.codegen.fixup and get %dispatch to work
2009-06-01 02:32:36 -05:00
fc152ef210
Various improvements aimed at getting local optimization regressions fixed:
...
- Rename _gc to ##gc
- Absolute labels are now supported
- Generate _dispatch-label
2009-05-31 23:28:08 -05:00
617e57fc75
cpu.x86.features: add RDTSC support. This is a new vocabulary with words: sse2? instruction-counter count-instructions
2009-05-31 15:02:14 -05:00
76d74c16af
Fixing various bugs; alias analysis wasn't handling ##phi nodes, stack analysis incorrectly handled height-changing back edges and ##fixnum-*, clean up ##dispatch generation
2009-05-29 01:39:14 -05:00
02b769475b
fix duplicate using lines
2009-05-17 20:29:32 -05:00
93509cdcec
Fix cpu.ppc for strict vocabulary search path semantics
2009-05-16 08:58:10 -05:00
66a9416473
Update documentation for stricter vocabulary search path semantics
2009-05-16 00:29:21 -05:00
05e0171dea
cpu.ppc: really fix bool type
2009-05-10 19:10:20 -05:00
9986f6e23e
Fix bool type on PowerPC
2009-05-10 19:01:38 -05:00
94bd764d35
Merge branch 'master' of git://factorcode.org/git/factor
2009-05-07 23:26:37 -05:00
e52476f108
cpu.ppc: fix alien-indirect
2009-05-07 23:26:33 -05:00
ff674dac22
cpu.ppc: bools are 4 bytes on OS X/PowerPC
2009-05-07 23:18:41 -05:00
b9169a6de2
Merge branch 'master' of git://factorcode.org/git/factor
2009-05-07 19:47:42 -05:00
5c4bb80bc3
Update PowerPC %jump and %dispatch-label, and add PIC-related functions to cpu-ppc.hpp
2009-05-07 19:47:38 -05:00
4a2492c3fc
Merge branch 'master' of git://factorcode.org/git/factor
2009-05-07 19:41:54 -05:00
25886ff453
cpu.ppc.bootstrap: updates
2009-05-07 19:40:25 -05:00
Slava Pestov
Slava Pestov
Doug Coleman
Slava Pestov
Joe Groff
U-C4\Administrator
Slava Pestov