66d0cafa94
fix buggy simd intrinsics
2009-11-26 13:28:40 -08:00
50f7dff422
change name of 'unsign-rep' to more sensible 'signed-rep'
2009-11-24 22:44:12 -08:00
c98eb84943
make math.vectors.simd tests pass again
2009-11-24 18:30:12 -08:00
9c388bf781
update compiler.cfg.intrinsics.simd tests
2009-11-24 12:50:27 -08:00
65d8060075
fix simd intrinsic compilation
2009-11-24 11:37:28 -08:00
152b0d2df5
break simd intrinsics into a separate vocab so they can be intrinsified before the simd methods compile
2009-11-19 11:53:46 -08:00
59d85f7ad6
fix primitive emit fallback for simd intrinsics
2009-11-18 21:29:51 -08:00
a3e4ecfc7d
enable simd intrinsics and fix first-pass compiler errors
2009-11-18 20:32:05 -08:00
6583875055
tests for all simd intrinsics
2009-11-18 18:20:58 -08:00
f545c5d3e5
properly handle -vector-op and case words in simd.backend
2009-11-18 12:36:41 -08:00
cd2cf91b95
start on tests for simd intrinsics
2009-11-17 11:13:16 -08:00
d56afe9c3d
compilation fixes
2009-11-14 23:43:22 -06:00
f544982fda
Merge branch 'master' of git://factorcode.org/git/factor into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-14 21:02:39 -06:00
8a8699ac98
backend fixups
2009-11-14 20:59:03 -06:00
e323071c44
sever lingering dependencies on simd from compiler
2009-11-11 16:08:40 -06:00
2afd7ce244
Faster identity-hashcode primitive; fast path now opencoded by the compiler
2009-11-11 02:27:19 -06:00
eac9bacf40
backend for choosing available SIMD intrinsic implementations
2009-11-10 23:35:46 -06:00
19283ed83d
compiler.cfg.intrinsics.slots: new implementation of value-tag
2009-11-10 17:30:27 -06:00
75d04922b9
Merge branch 'master' into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-05 11:27:08 -06:00
4d54f27cd1
more intrinsic madness
2009-11-05 09:52:57 -06:00
3c4c05e915
compiler.cfg.intrinsics.allot: fix inline byte array allocation on 32-bit platforms
2009-11-03 23:44:20 -06:00
bd77633d5b
new intrinsic generators, pt1
2009-11-03 21:38:45 -06:00
51e9a891a8
cpu.x86: update %box-displaced-alien for introduction of address field
2009-11-03 03:17:43 -06:00
91ccc30a54
Merge branch 'master' into new_gc
2009-11-02 20:34:13 -06:00
0a15ae4d6b
compiler.cfg.intrinsics: uncomment line commented out by mistake
2009-11-02 20:33:14 -06:00
495f776d54
Merge branch 'master' into new_gc
2009-11-02 20:11:43 -06:00
8bd2273e44
compiler.cfg: don't generate useless methods in instruction meta-programming. reduces bootstrap time
2009-11-02 20:11:29 -06:00
a3b5c07e80
Minor bug fixes for 4-bit tags
2009-11-02 17:41:36 -06:00
e36eb438fa
move all simd intrinsics to compiler.cfg.intrinsics.simd, and only load it when math.vectors.simd is loaded
2009-11-02 15:17:34 -06:00
e4ad642134
vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
2009-11-02 04:25:54 -06:00
b858860a67
add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
2009-10-30 00:41:19 -05:00
6e1bffb1c5
update existing code to use :> ( ) when possible
2009-10-28 16:11:33 -05:00
2ecf3fb568
fix load errors from bootstrapping
2009-10-28 12:51:03 -05:00
935c0797c3
update existing code for [let change
2009-10-27 22:05:37 -05:00
8a6b0a1453
generate unsigned vector comparison fallbacks using min/max or xor/signed compare
2009-10-20 22:30:57 -05:00
cb36111a3c
generate better fallback code for vmin/vmax intrinsics
2009-10-20 19:22:38 -05:00
2d5cdd19ec
compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure
2009-10-19 04:58:29 -05:00
448ef2f1d5
fix unsigned vector unpack
2009-10-16 14:25:33 -05:00
7d97c19227
compiler: tweak ##write-barrier-imm
2009-10-15 02:40:23 -05:00
1ce39963fd
Working on adding support for the new write barrier to optimized code
2009-10-14 02:06:01 -05:00
97ab9dc4ab
only emit ##alien-vector/##set-alien-vector insns if the rep is available
2009-10-10 12:53:10 -05:00
d9002127fa
have vshuffle accept simd-128 variable byte shuffles
2009-10-10 11:30:11 -05:00
3bc097f6ff
rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
2009-10-09 21:26:27 -05:00
471c86a110
generate better code for vabs when instruction isn't available instead of using software fallback (-0.0 andn for floats, x > 0 ? x : -x for signed ints, nop for unsigned ints)
2009-10-09 14:24:55 -05:00
01f5d392be
implement vneg as an intrinsic in terms of load -0, subtract
2009-10-09 13:16:39 -05:00
dd691a61e8
break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
2009-10-07 15:27:03 -05:00
f2c9eb79e2
decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
2009-10-07 14:09:46 -05:00
34def34481
don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
2009-10-07 11:59:36 -05:00
785f8620fd
glue conversion intrinsics to instructions
2009-10-06 20:13:38 -05:00
fbe810fc3b
rename SIMD vmerge and kids to (vmerge), make new vmerge more generally useful
2009-10-05 17:55:39 -05:00
b4e36608da
compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
2009-10-05 05:27:49 -05:00
0c9c3d4859
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
04bb03bb61
add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
2009-10-03 11:29:34 -05:00
38f413a8a6
add intrinsic for vnot/vbitnot
2009-10-02 20:04:28 -05:00
aa3392e50f
implement vand, vor, vandn, and vxor as bitwise intrinsics for simd types
2009-10-02 14:17:01 -05:00
53b265f682
Merge branch 'master' of git://factorcode.org/git/factor
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Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
d14f150b58
%test-vector instruction for vany?, vall?, vnone?
2009-10-01 15:35:38 -05:00
987ced4070
%compare-vector instruction (only does v= for now)
2009-10-01 14:31:37 -05:00
a93f8f66f9
Revert "add a %blend-vector intrinsic for v?"
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This reverts commit 21e4b28b67
2009-09-30 23:40:37 -05:00
67cc45235d
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-30 23:04:04 -05:00
7db7b63552
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
2384b630b2
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
cdc7b7e2c7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
80e84a357d
math.vectors.simd: add vbroadcast intrinsic, fix integer overflow issues
2009-09-29 22:58:20 -05:00
f395d83379
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
e40a95c1e1
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
a8ea929ad9
Work in progress
2009-09-28 17:31:34 -05:00
b2ea3afd84
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
59fbe85c9b
compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
2009-09-27 20:36:05 -05:00
01a4047126
Merge branch 'slots' of git://factorcode.org/git/factor into slots
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Conflicts:
basis/cpu/x86/x86.factor
2009-09-26 03:12:42 -05:00
51f2bbd74b
Completing slot and set-slot changes on x86
2009-09-26 01:39:48 -05:00
7bd330cfd5
Making ##slot and ##set-slot not have a temporary parameter
2009-09-26 00:28:14 -05:00
bbbb207dab
Some fixes and cleanups in math.vectors
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- Tighten up type inference for operations on complex float arrays
- Fix v. to have correct behavior with complex numbers
- Rename v<< and v>> to vlshift and vrshift to avoid clashing with v>> accessor
2009-09-24 06:58:33 -05:00
7b6128dd03
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
43fa252af5
math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
2009-09-23 02:47:14 -05:00
9d90bdd439
Fix conflict
2009-09-20 23:18:07 -05:00
ea44ea3522
math.vectors.simd: add saturated arithmetic operations
2009-09-20 23:16:02 -05:00
acea55c692
math.vectors: add v+- word which is accelerated by SSE3
2009-09-20 17:43:16 -05:00
ff8f2b10ec
fixed up getenv compiler intrinsic to use vm struct userenv
2009-09-16 08:16:32 +01:00
4f702de449
math.functions: more accurate log10 (fixes problem reported by OneEyed)
2009-09-14 16:19:58 -05:00
32b95c2cdf
math: add unordered comparison operators u< u<= u> u>= which behave exactly like < <= > >= except no floating point exceptions are set if one or both inputs are NaNs; also add efficient intrinsic for unordered? predicate, and fix propagation type functions for abs, absq, and bitnot
2009-09-12 22:20:13 -05:00
86a848bae6
compiler.cfg.intrinsics: compile float-mod as a ##binary-float-function instead of a primitive call
2009-09-11 21:00:17 -05:00
0ea9949e51
split unordered and ordered float comparison intrinsics in compiler; generate only unordered comparisons for now
2009-09-08 17:04:26 -05:00
c92e54b560
compiler.cfg.intrinsics: fix type detection on the alien type for vector accessors
2009-09-04 02:22:54 -05:00
4d5a4222b6
More SIMD work
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- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
bf81cb4259
math.vectors.simd: split off intrinsics into a sub-vocabulary, to avoid loading most of the SIMD code on bootstrap
2009-09-03 03:43:43 -05:00
ff8c70dbe0
Initial implementation of SSE vector intrinsics:
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- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
85a2bfab6c
compiler: eliminate boilerplate by centralizing info in declarative INSN: syntax
2009-09-02 06:22:37 -05:00
f91b539c31
cpu.ppc: implement fast float function calls; 3x speedup on benchmark.struct-arrays on PowerPC
2009-09-01 15:19:26 -05:00
868009aaee
compiler.cfg.intrinsics: cleanup: the "intrinsic" word property is now a quotation, not a boolean, making this mechanism more extensible
2009-08-30 22:20:49 -05:00
0db01f6d5f
compiler.cfg.linear-scan now supports partial sync-points where all registers are spilled; taking advantage of this, there are new trigonometric intrinsics which yield a 2x performance boost on benchmark.struct-arrays and a 25% boost on benchmark.partial-sums
2009-08-30 04:52:01 -05:00
2bb6293217
compiler: add fixnum-min/max intrinsics; ~10% speedup on benchmark.yuv-to-rgb
2009-08-28 19:02:59 -05:00
d957ae4e44
Performance improvements to make struct-arrays benchmark faster
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- improved optimization of ##unbox-any-c-ptr on ##box-displaced-alien; convert it to ##unbox-c-ptr where possible using class info stored in the ##bda instruction
- make fcos, fsin, etc inline again; everything in math.libm inline again, except for fsqrt which is an intrinsic
- convert min and max on floats to float-min and float-max
- make min and max not inline, so that the above can work
- struct-arrays: rice a bit so that more fixnums come up
2009-08-28 05:21:16 -05:00
f662e6403a
compiler: new inline intrinsic for <displaced-alien> where the inputs have known types; value numbering now eliminates unnecessary allocation of displaced aliens if the result is immediately unboxed again
2009-08-27 00:06:19 -05:00
0df8aadce2
cpu.x86: use SQRTSD instruction for math.libm:fsqrt word
2009-08-25 23:22:15 -05:00
3f3d57032b
Delete empty unit tests files, remove 1- and 1+, reorder IN: lines in a lot of places, minor refactoring
2009-08-13 19:21:44 -05:00
4b7ba38aab
compiler.cfg: virtual registers are integers now, and representations are stored off to the side. Fix bug in representation selection that would manifest if a value was used as a float and a fixnum in different branches; cannot globally unbox float in this case
2009-08-08 04:02:18 -05:00
e21ca289c3
compiler.cfg.representations: new pass to make global unboxing decisions, relies on new compiler.cfg.loop-detection pass for loop nesting information
2009-08-08 00:24:46 -05:00
725280d424
Split off the notion of a register representation from a register class
2009-08-07 17:44:50 -05:00
be363d1a5b
compiler.cfg: Get inline GC checks working again, using a dataflow analysis to compute uninitialized stack locations in compiler.cfg.stacks.uninitialized. Re-enable intrinsics which use inline allocation
2009-07-30 09:19:44 -05:00
Joe Groff
Slava Pestov
Slava Pestov
sheeple
Daniel Ehrenberg
Phil Dawes
Slava Pestov
Doug Coleman