Commit Graph

43 Commits (c20e6c290f94d80cf853c093c8b54991f8a05f7f)

Author SHA1 Message Date
Slava Pestov a452f32e3a compiler.cfg.linear-scan: Get cycle breaking in resolve pass to work by allocating a spare spill slot for this purpose 2009-07-05 21:32:23 -05:00
Slava Pestov fb488025aa compiler.cfg.value-numbering.rewrite: fix ##compare-imm rewrite rule 2009-07-04 02:50:50 -05:00
Slava Pestov da13681bc8 compiler.cfg.linear-scan: redo resolve pass to fix a correctness issue 2009-07-03 23:38:52 -05:00
Slava Pestov 8d3a45dee2 compiler.cfg: clean up GC check generation to use spill-slot data type 2009-07-03 23:11:23 -05:00
Slava Pestov af875ba836 compiler.cfg: bug fixes in GC check insertion and fixnum intrinsics 2009-07-02 00:51:06 -05:00
Slava Pestov 0402790001 compiler.cfg Remove height tracking for ##call instructions, wire in ##no-tco instruction 2009-06-30 21:21:46 -05:00
Doug Coleman d1f6871081 fix bug where traversal order was lost 2009-06-30 16:44:14 -05:00
Doug Coleman 90017eb248 add spill-temp to compiler.cfg.instructions, implement parallel register assignment in linear-scan.resolve 2009-06-26 21:48:21 -05:00
Slava Pestov d0f6a7d048 Split up compiler.cfg.linear-scan.allocation into a number of sub-vocabularies; start work on compiler.cfg.linear-scan.resolve; start work on inactive interval splitting 2009-06-11 17:55:14 -05:00
Slava Pestov 2d231f066a GC checks now save and restore registers 2009-06-02 18:23:47 -05:00
Slava Pestov 1a52414bb1 Rename _gc to ##gc 2009-05-31 18:21:11 -05:00
Slava Pestov e04df76f60 Various codegen improvements:
- new-insn word to construct instructions
- cache RPO in the CFG
- re-organize low-level optimizer so that MR is built after register allocation
- register allocation now stores instruction numbers in the instructions themselves
- split defs-vregs into defs-vregs and temp-vregs
2009-05-29 13:11:34 -05:00
Slava Pestov 743550f19c Put GC checks in the right place when linearizing, and generate _dispatch-labels 2009-05-29 05:36:04 -05:00
Slava Pestov 76d74c16af Fixing various bugs; alias analysis wasn't handling ##phi nodes, stack analysis incorrectly handled height-changing back edges and ##fixnum-*, clean up ##dispatch generation 2009-05-29 01:39:14 -05:00
Slava Pestov 3b79d61496 Add a new ##allocation union to remove some code duplication 2009-05-27 18:55:49 -05:00
Slava Pestov 1db81da264 Refactoring low-level optimizer to support stack analysis pass 2009-05-26 19:31:19 -05:00
Slava Pestov 6af61656f3 CFG optimizer work in progress - adding phi nodes 2009-05-21 16:49:28 -05:00
Slava Pestov e58fcd485c Working on global optimizations 2009-05-19 17:28:13 -05:00
Slava Pestov 44bfff7c7b Rename ##load-indirect to ##load-reference since this is more descriptive; value numbering doesn't assign expressions to ##load-reference nodes since this would end up folding literals which were eq? but not = 2009-01-29 01:44:58 -06:00
Slava Pestov 8a8f0c925c Use BSR instruction to implement fixnum-log2 intrinsic 2008-12-06 15:31:17 -06:00
Slava Pestov a56d480aa6 Various optimizations leading to a 10% speedup on compiling empty EBNF parser:
- open-code getenv primitive
- inline tuple predicates in finalization
- faster partial dispatch
- faster built-in type predicates
- faster tuple predicates
- faster lo-tag dispatch
- compile V{ } clone and H{ } clone more efficiently
- add fixnum fast-path to =; avoid indirect branch if two fixnums not eq
- faster >alist on hashtables
2008-12-06 09:16:29 -06:00
Slava Pestov e256846acd Tweak string representation; high bit indicates if character has high bits in aux vector. Avoids memory access in common case. Split set-string-nth into two primitives; set-string-nth-fast is open-coded by optimizing compiler. 13% improvement on reverse-complement 2008-12-05 06:38:51 -06:00
Slava Pestov e7f4563374 fixnum* intrinsic for x86 2008-11-30 07:26:49 -06:00
Slava Pestov f44506089d More work on overflow instructions: don't need temp register anymore, add -tail variants which don't need stack frame 2008-11-28 06:36:30 -06:00
Slava Pestov 5634becda1 ##fixnum-add, ##fixnum-sub instructions open-code overflow check 2008-11-28 05:33:58 -06:00
Slava Pestov ab689c098b Clean up direct literal code and make a first attempt at PowerPC support 2008-11-24 08:16:14 -06:00
Slava Pestov eb05dd3a12 Optimize a ##dispatch that is applied to the result of a ##sub-imm or ##add-imm; this eliminates an instruction from the common 1 fixnum-fast { ... } dispatch and 8 fixnum-fast { ... } dispatch code sequences appearing in generic word expansions 2008-11-13 04:16:08 -06:00
Slava Pestov 53cd75b06c Add string-nth intrinsic 2008-11-06 01:11:28 -06:00
Slava Pestov 59f4f25b91 Loop alignment: appears to be a small win for reverse-complement 2008-11-03 06:20:51 -06:00
Slava Pestov 445e353337 Optimize away useless jumps 2008-11-02 23:09:31 -06:00
Slava Pestov 492a15e345 Move insn class to compiler.cfg.instructions 2008-10-24 09:17:06 -05:00
Slava Pestov 084e64d0bc Tweak inheritance 2008-10-22 21:58:46 -05:00
Slava Pestov 73d01452cb Replace ##gc with a gc flag in the basic block 2008-10-22 18:38:30 -05:00
Slava Pestov 1b06ab1b39 Fixing various bugs 2008-10-21 23:17:32 -05:00
Slava Pestov e92f795a76 More work on intrinsics; memory allocation and slot access now expands correctly 2008-10-20 20:40:15 -05:00
Slava Pestov 37cf7d9a9c Add SSA comparison instructions, fix various problems 2008-10-20 05:55:20 -05:00
Slava Pestov f092622fac CFG IR is now pure SSA 2008-10-20 01:56:28 -05:00
Slava Pestov c0d89b061e Fixing register allocator prspilling 2008-10-19 01:10:21 -05:00
Slava Pestov 627dfd1ff5 Finish vreg simplification 2008-10-17 20:03:59 -05:00
Slava Pestov 239578353f Simplifying vregs work in progress 2008-10-17 15:35:04 -05:00
Slava Pestov ae3c4ae1b6 Fix some problems with callbacks 2008-10-12 23:32:14 -05:00
Slava Pestov 3844cb62d8 Fix %write-barrier 2008-10-10 03:16:26 -05:00
Slava Pestov f436fd0c0f Merging in new codegen 2008-10-07 16:16:50 -05:00