943596575a
use radix literals
2011-11-23 19:03:40 -08:00
ae1a903c4e
cpu.x86.assembler: add MOVABS instruction
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MOVABS generates the one-byte opcode version of MOV eAX, [absolute] or MOV [absolute], eAX, which saves a byte per safepoint on x86-32.
2011-10-27 21:14:45 -07:00
732befe272
cpu.x86.assembler: add MOVQ xmm, xmm/m64 and MOVQ xmm/m64, xmm instructions
2010-07-08 10:19:11 -07:00
b67080b69d
cpu.x86.assembler: drop useless ST0 operand from some x87 instructions
2010-05-18 19:37:59 -04:00
f5a951801e
cpu.x86.assembler: AH CH DH BH register operands now work properly
2010-05-18 17:10:32 -04:00
93abc7d169
cpu.x86.assembler: a choice selection of x87 instructions
2010-05-17 02:02:40 -07:00
986ed057d8
cpu.x86.assembler: BT family instructions
2010-05-15 13:08:22 -07:00
652c4c28c6
cpu.x86.assembler: fix test on 64-bit
2010-05-03 20:16:13 -04:00
655497b7b4
cpu.x86.assembler: small cleanups
2010-05-03 17:34:15 -04:00
6d41d2277f
cpu.x86.assembler: support all addressing modes
2010-05-03 17:34:06 -04:00
c0af678c5b
cpu.x86.assembler: add support for absolute addressing on x86-64; [RIP+] now behaves like [] did, and [] now does absolute addressing just like in 32-bit mode
2010-04-04 19:42:57 -04:00
7d24459bb8
cpu.x86.assembler: add segment override prefixes
2010-03-31 20:47:13 -04:00
2e8bb98781
cpu.x86.assembler: make SSE shuffle instructions accept an array of indexes so they're easier to use
2009-09-28 11:45:45 -05:00
b6ddcafcbd
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 11:05:36 -05:00
455956b16c
add additional SSE2 packed integer operations
2009-07-30 11:05:12 -05:00
1e8d13c1f1
cpu.x86.assembler: fix extended 8-bit registers (DIL, SIL, SPL, BPL)
2009-07-29 22:32:22 -05:00
73862a9a03
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
9f3c8a9959
SSE4 opcodes for x86 assembler
2009-07-28 12:19:37 -05:00
5372113fce
SSE1–SSSE3 opcodes + branch hints for x86 assembler
2009-07-28 00:22:27 -05:00
45a2105449
cpu.x86.assembler: IMUL2 instruction was busted for immediate operands
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When given a register and an immediate, it would generate imul imm,dst,dst however the 64-bit prefix was generated wrong and if dst was an extended register only the first operand would be an extended register. To fix this, change IMUL2 to not work on immediates anymore, and added a new IMUL3 that takes a destination register, source register, and immediate. Also, change compiler.cfg.two-operand to not two-operandize %mul-imm, since this isn't needed anymore.
This fixes the sporadic benchmark.tuple-arrays crash on 64-bit machines.
2009-06-08 21:15:52 -05:00
5188f4e1f0
Fix TEST opcode in cpu.x86.assembler
2009-04-29 22:23:42 -05:00
abb02f1784
Flesh out shift instructions
2008-11-03 00:03:00 -06:00
52020c2fe3
Fixing x86 instruction encoding for addressing with base = ESP or R12
2008-10-21 23:18:27 -05:00
0c8e2584b4
Fixing unit tests for make, fry changes
2008-09-11 00:20:06 -05:00
d66f887736
Create basis vocab root
2008-07-28 22:03:13 -05:00
Joe Groff
Slava Pestov