81430947d5
PowerPC: fix set-callstack primitive and start updating optimizing compiler backend for recent changes
2009-12-28 08:08:15 -06:00
94fbd8a224
cpu.ppc: fix non-optimizing compiler backend
2009-12-29 02:42:34 +13:00
285caff08e
Updating non-optimizing PowerPC backend for register variable removal (untested)
2009-12-28 12:40:45 +13:00
a77f48fe6b
Updating x86-64 port for global register variable removal
2009-12-27 01:17:42 +13:00
67153bf4bb
Fix bug in c_to_factor
2009-12-26 15:24:46 +13:00
15eb8d1a0a
vm: remove VM_ASM_API
2009-12-24 01:37:24 +13:00
e96404327e
Get optimizing compiler working without global register variables in VM
2009-12-22 15:42:49 +13:00
63edd20a55
vm: eliminating register variables work in progress. Works on x86-32 with non-optimizing compiler
2009-12-19 10:59:56 +13:00
c4719b7f5f
Fix PowerPC compiler backend for recent changes
2009-12-15 09:51:20 -05:00
0068bce934
vm: big overhaul of non-optimizing compiler
...
- change some primitives into sub-primitives: fixnum+ fixnum- fixnum* inline-cache-miss inline-cache-miss-tail
- rename some relocation types for clarity
- some other minor re-organizations and cleanups
2009-12-15 07:20:09 -05:00
3e40a36c50
fix simd tests
2009-12-05 17:17:16 -08:00
1c40e4faa4
implement %scalar>integer for longlong reps on x86.64
2009-12-05 15:38:43 -08:00
104c29aabc
simd intrinsic implementation for v*high, v*hs+, vavg, and vsad
2009-12-05 14:52:18 -08:00
63b89c65f9
don't use intrinsics for simd vector element operations when the component size doesn't fit in a fixnum
2009-12-03 12:46:56 -08:00
7c8d755c45
Fix bootstrap
2009-12-02 19:24:46 -05:00
73eb4c4531
Merge branch 'simd-cleanup' of git://factorcode.org/git/factor into simd-cleanup
2009-12-02 19:09:56 -05:00
68c09f0e93
Split literal table into literal and parameter tables, literal table is discarded after code block initialization
2009-12-02 04:28:15 -06:00
67cc1c01be
Merge branch 'master' into simd-cleanup
2009-11-26 16:14:46 -08:00
50f7dff422
change name of 'unsign-rep' to more sensible 'signed-rep'
2009-11-24 22:44:12 -08:00
d94ffe6d78
scalar fallbacks for simd intrinsics
2009-11-23 21:24:55 -08:00
0612bc6177
Factor source files should not be executable
2009-11-21 17:50:43 -06:00
7f546daead
fill in longlong cases for %scalar>integer (won't work on 32bit yet!)
2009-11-19 12:15:24 -08:00
152b0d2df5
break simd intrinsics into a separate vocab so they can be intrinsified before the simd methods compile
2009-11-19 11:53:46 -08:00
6583875055
tests for all simd intrinsics
2009-11-18 18:20:58 -08:00
d7e77650d8
cpu.86.64.winnt: silence notice
2009-11-16 00:32:19 -06:00
cc194416f9
Merge branch 'master' into startup
...
Conflicts:
core/bootstrap/primitives.factor
vm/run.hpp
2009-11-15 02:52:50 -06:00
f544982fda
Merge branch 'master' of git://factorcode.org/git/factor into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-14 21:02:39 -06:00
88be646eee
cpu.ppc: update for recent changes
2009-11-11 21:26:07 -06:00
064c00f78d
New identity-hashcode primitive
2009-11-10 21:18:54 -06:00
e9a7191050
Fix struct field alignment on PowerPC
2009-11-10 19:34:14 -06:00
41e340f231
More PowerPC fixes
2009-11-10 17:26:34 -06:00
1002898b7d
cpu.ppc: update megamorphic dispatch template
2009-11-10 17:13:20 -06:00
8894e9047c
Merge branch 'master' into simd-cleanup
2009-11-07 22:26:09 -06:00
00ce8b6a33
deprimitivize tuck and put it to pasture
2009-11-05 22:47:05 -06:00
75d04922b9
Merge branch 'master' into simd-cleanup
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Conflicts:
basis/math/vectors/simd/functor/functor.factor
2009-11-05 11:27:08 -06:00
4d54f27cd1
more intrinsic madness
2009-11-05 09:52:57 -06:00
fba6ddbc22
Move platform-specific c-type initialization out of cpu.* vocabularies and into alien.c-types so that the vm vocabulary, which is loaded before cpu.*, will have correct struct offsets
2009-11-05 01:36:14 -06:00
f6643a1c72
change ##horizontal-add-vector insn to better match what the HADD SSE instructions do (add adjacent pairs, pack results)
2009-11-04 12:18:01 -06:00
2b1a26228b
Align stack pointer on non-Mac OS X x86-32 platforms, and use aligned loads/stores for SIMD values
2009-11-03 23:51:44 -06:00
d655c3c9cc
make horizontal shift available to float vectors (it'd still be faster than the software fallback despite pipeline penalty)
2009-11-03 21:38:29 -06:00
51e9a891a8
cpu.x86: update %box-displaced-alien for introduction of address field
2009-11-03 03:17:43 -06:00
a3b5c07e80
Minor bug fixes for 4-bit tags
2009-11-02 17:41:36 -06:00
e36eb438fa
move all simd intrinsics to compiler.cfg.intrinsics.simd, and only load it when math.vectors.simd is loaded
2009-11-02 15:17:34 -06:00
e4ad642134
vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
2009-11-02 04:25:54 -06:00
7e17c3077c
vm: new megamorphic hashcode algorithm improves bootstrap speed
2009-11-02 01:37:58 -06:00
f21199005d
Merge branch 'master' into new_gc
2009-11-01 22:17:27 -06:00
aaba25527c
typo in cpu.x86
2009-11-01 19:39:57 -06:00
36e4a141c4
clear destination register before doing CVTS* to break dependency chains
2009-11-01 18:29:12 -06:00
fa8ec06ab5
SSE code generation improvements: always use MOVAPS to move float xmm registers to kill dependency chains, and favor -PS versions of logical, move, and shuffle ops to shrink code size
2009-11-01 16:09:44 -06:00
6f9336c29e
Merge branch 'master' into new_gc
2009-10-30 03:03:05 -05:00
b858860a67
add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
2009-10-30 00:41:19 -05:00
7e88ead665
fix build errors
2009-10-28 19:28:16 -05:00
c5c31b4300
Merge branch 'master' of git://factorcode.org/git/factor
2009-10-28 16:19:37 -05:00
bb0921ef42
oops, cpu.arm was not loaded by default
2009-10-28 16:18:47 -05:00
3fbe722561
Merge branch 'master' of http://factorcode.org/git/factor
...
Conflicts:
basis/locals/locals.factor
basis/peg/peg.factor
extra/infix/infix.factor
2009-10-28 16:17:24 -05:00
6e1bffb1c5
update existing code to use :> ( ) when possible
2009-10-28 16:11:33 -05:00
bf27177e93
fix using
2009-10-28 15:32:34 -05:00
81439ab4be
make the ARM assembler unportable
2009-10-28 15:30:51 -05:00
bd13e018dd
memq? -> member-eq?, sorted-memq? -> sorted-member-eq?
2009-10-28 15:02:00 -05:00
7ce4b746e5
parsed -> suffix!, add append!
2009-10-28 13:38:27 -05:00
3394309659
Merge branch 'master' into new_gc
2009-10-22 05:40:57 -05:00
66dc1c6311
oops, longlong comparison is sse4.2, not 4.1
2009-10-21 23:00:02 -05:00
8a6b0a1453
generate unsigned vector comparison fallbacks using min/max or xor/signed compare
2009-10-20 22:30:57 -05:00
f2b159529c
Merge branch 'master' into startup
2009-10-20 15:01:06 -04:00
d85d84697a
Change data heap alignment to 16 bytes
2009-10-20 12:45:00 -05:00
18be7e1f37
cpu.x86.32: only create 16-byte parameter area if the word calls into the VM
2009-10-20 05:02:42 -05:00
1e7893b6ce
compiler: FFI is now slightly more efficient when unboxing parameters, only changes data stack height once
2009-10-20 04:31:48 -05:00
560b6f45cc
compiler, cpu.x86.32: clean up FFI implementation, in particular 32-bit x86-specific backend
2009-10-20 04:15:10 -05:00
6b6e56a179
change add-init-hook to add-startup-hook, new add-shutdown-hook word
2009-10-19 22:17:02 -04:00
2d5cdd19ec
compiler: on PPC, ANDI, ORI and XORI instructions take an unsigned 16-bit immediate, unlike ADDI, SUBI and MULLI which take a signed 16-bit immediate. The code generator was not aware of this, and so for example '[ >fixnum -16 bitand ]' would generate incorrect code. Split up small-enough? hook into immediate-arithmetic? and immediate-bitwise? and update value numbering to be aware of this. Fixes classes.struct bitfields test failure
2009-10-19 04:58:29 -05:00
86c16eeb6a
cpu.x86.32: fix callbacks on platforms where stack is not aligned
2009-10-17 21:20:08 -05:00
a7fcaf027c
use FRSP to convert double to single on PPC
2009-10-17 00:13:50 -05:00
b762238f63
cpu.x86.32: fix magic stack frame handling
2009-10-16 21:07:09 -05:00
8aa4640094
cpu.ppc.bootstrap: fix callback-stub relocation
2009-10-16 12:06:40 -05:00
107c96f642
vm: code heap compaction at runtime using compact-gc primitive
2009-10-16 11:39:35 -05:00
982a8fa411
cpu.x86.64: fix typo
2009-10-15 23:29:56 -05:00
6641c530d5
cpu.x86: eliminate 2 instructions form write barrier on x86-32
2009-10-15 22:07:03 -05:00
15e4f08d78
Merge branch 'master' of git://factorcode.org/git/factor
2009-10-15 05:43:41 -05:00
d3ec94b5c9
cpu.x86: just a cleanup
2009-10-15 05:43:28 -05:00
70c69fbd67
cpu.ppc: fix %write-barrier
2009-10-15 05:13:47 -05:00
13ca35ba79
cpu.ppc: fix typo
2009-10-15 05:01:20 -05:00
a506754739
cpu.ppc: updates for write barrier and allocation changes (untested)
2009-10-15 04:54:16 -05:00
2efc7d1b9e
cpu.ppc.bootstrap: update for JIT relocation changes
2009-10-15 04:47:54 -05:00
7d97c19227
compiler: tweak ##write-barrier-imm
2009-10-15 02:40:23 -05:00
38d120f92e
vm: rt-vm relocation now supports accessing a field directly
2009-10-14 19:24:23 -05:00
1ce39963fd
Working on adding support for the new write barrier to optimized code
2009-10-14 02:06:01 -05:00
4e4be60884
use TEST reg, reg to compare integer equality with zero
2009-10-10 13:13:53 -05:00
97ab9dc4ab
only emit ##alien-vector/##set-alien-vector insns if the rep is available
2009-10-10 12:53:10 -05:00
a5898dffde
don't use MOVSLDUP/MOVSHDUP to do specialized shuffles unless sse3 is available
2009-10-10 12:00:47 -05:00
1fa6f32790
fix x86 uchar %scalar>integer
2009-10-10 10:39:23 -05:00
3bc097f6ff
rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
2009-10-09 21:26:27 -05:00
9357ee378e
cpu.architecture: move dummy -reps words here, from cpu.ppc
2009-10-08 03:48:03 -05:00
dd691a61e8
break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
2009-10-07 15:27:03 -05:00
f2c9eb79e2
decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
2009-10-07 14:09:46 -05:00
4d5f727a63
sse doesn't actually have an unsigned->unsigned pack instruction
2009-10-07 12:00:31 -05:00
34def34481
don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
2009-10-07 11:59:36 -05:00
879fe9a665
fix x86 %unpack-vector insns
2009-10-06 20:38:51 -05:00
da4cf61014
oops...PACKUSDW is sse4 only
2009-10-06 20:09:50 -05:00
882f40d88e
%float>integer-vector should truncate
2009-10-06 13:57:54 -05:00
529c444e32
add insns for vector pack, unpack, integer>float, and float>integer
2009-10-05 22:34:14 -05:00
Slava Pestov
Slava Pestov
Joe Groff
Doug Coleman
Slava Pestov