b4e36608da
compiler.cfg: remove _gc instruction, it doesn't need to exist, and change GC checks to ensure that the right amount of space is available instead of blindly checking for 1Kb
2009-10-05 05:27:49 -05:00
0c9c3d4859
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
04bb03bb61
add intrinsics for v<=, v<, v=, v>, v>=, vunordered?
2009-10-03 11:29:34 -05:00
74f15cfe8c
Merge branch 'master' of git://factorcode.org/git/factor
2009-10-03 10:02:26 -05:00
4e024cbbc2
extend x86 %compare-vector to cover all comparison codes, sometimes stupidly for now
2009-10-02 23:19:56 -05:00
5fc3ad92f6
cpu.arm.assembler: dust it off, update to work with contemporary Factor, and clean it up a bit
2009-10-02 20:18:34 -05:00
38f413a8a6
add intrinsic for vnot/vbitnot
2009-10-02 20:04:28 -05:00
df9b0f695f
cpu.ppc: remove useless comment
2009-10-02 03:31:53 -05:00
2c136d6536
Merge branch 'reentrantvm' of git://github.com/phildawes/factor
2009-10-02 03:28:21 -05:00
53b265f682
Merge branch 'master' of git://factorcode.org/git/factor
...
Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
f9695951a0
fold test-vector/branch sequences into a test-vector-branch instruction
2009-10-01 19:53:30 -05:00
d14f150b58
%test-vector instruction for vany?, vall?, vnone?
2009-10-01 15:35:38 -05:00
987ced4070
%compare-vector instruction (only does v= for now)
2009-10-01 14:31:37 -05:00
a93f8f66f9
Revert "add a %blend-vector intrinsic for v?"
...
This reverts commit 21e4b28b67
2009-09-30 23:40:37 -05:00
67cc45235d
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-30 23:04:04 -05:00
7db7b63552
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
2384b630b2
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
a7dd4ad5cc
cpu.ppc: update for alien intrinsic changes
2009-09-30 18:22:59 -05:00
bc70311e69
ppc asm to pass vm pointer: alien + compiled code
2009-09-30 21:23:53 +01:00
cdc7b7e2c7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
f395d83379
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
e40a95c1e1
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
a8ea929ad9
Work in progress
2009-09-28 17:31:34 -05:00
e1a9b25562
cpu.ppc: update for %unary/binary-float-function change
2009-09-28 16:40:52 -05:00
4202211293
cpu.x86: cleanups
2009-09-28 16:38:35 -05:00
01f526ff28
use PSHUFD for longlong-2 broadcast when dst != src to avoid a %copy
2009-09-28 12:04:08 -05:00
7520da41cc
use MOVDDUP for double-2 broadcast to eliminate a %copy
2009-09-28 12:00:03 -05:00
2e8bb98781
cpu.x86.assembler: make SSE shuffle instructions accept an array of indexes so they're easier to use
2009-09-28 11:45:45 -05:00
965730efbe
SSE integer gather and broadcast
2009-09-28 11:24:08 -05:00
4abfe06b51
Fixing various test failures caused by C type parser change, and clarify C type docs some more
2009-09-28 08:48:39 -05:00
9a06e6f424
math.vectors.simd: add intrinsic for int-4-boa, uint-4-boa, fix tests for C type parser change, fix software fallback for horizontal shifts
2009-09-28 06:34:22 -05:00
08a2eb74f4
cpu.x86: shifts didn't work if dst != src1; re-organize file a bit
2009-09-28 05:39:53 -05:00
f73bb2d068
cpu.x86.32: fix %unary/binary-float-function on Windows; need to look up symbols in libm and not VM binary
2009-09-28 04:51:53 -05:00
6fa0a93498
ppc asm to pass vm pointer: initial bootstrap
2009-09-28 07:48:37 +01:00
7e4b9b6377
cpu.x86: fix regression: fsqrt intrinsic wasn't used
2009-09-28 02:27:55 -05:00
b2ea3afd84
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
59fbe85c9b
compiler.cfg: nuke ##bignum>integer and ##integer>bignum since they were unused
2009-09-27 20:36:05 -05:00
f757b454cc
Merge branch 'master' into more_aggressive_coalescing
2009-09-27 19:29:50 -05:00
705b4ab5c3
compiler.cfg.linear-scan: fix partial sync point logic in case where dst == src, and clean up spilling code
2009-09-27 19:28:20 -05:00
91e63c0c6f
cpu.x86.32: implement %unary-float-function and %binary-float-function; speeds up partial-sums and struct-arrays benchmarks
2009-09-27 18:06:30 -05:00
1e841e5086
compiler.cfg.ssa.destruction: more aggressive coalescing work in progress
2009-09-27 17:17:26 -05:00
dce02fcdfb
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-26 20:38:19 -05:00
2cf0f3e5d3
move alien.inline, alien.cxx, alien.marshall to unmaintained; nuke alien.structs
2009-09-26 20:37:42 -05:00
3476f2e28c
Fixing PPC backend for ##slot change
2009-09-26 13:21:42 -05:00
01a4047126
Merge branch 'slots' of git://factorcode.org/git/factor into slots
...
Conflicts:
basis/cpu/x86/x86.factor
2009-09-26 03:12:42 -05:00
30bca97b61
An attempt at porting the slot change to PPC
2009-09-26 02:58:18 -05:00
51f2bbd74b
Completing slot and set-slot changes on x86
2009-09-26 01:39:48 -05:00
7bd330cfd5
Making ##slot and ##set-slot not have a temporary parameter
2009-09-26 00:28:14 -05:00
8610fa5e48
cpu: cleanups
2009-09-25 21:47:05 -05:00
46f90c7588
removed %vm-invoke-*-arg completely
2009-09-25 20:03:03 +01:00
d457df1fbf
moved %(un)nest-stacks out to cpu specific files to eliminate %vm-invoke from compiler.codegen
2009-09-25 19:32:08 +01:00
28420c587a
isolated %vm-invoke-blah-arg crap to 64.factor
2009-09-25 19:02:41 +01:00
68f85a69b3
removed param-reg-* HOOKs
2009-09-25 18:58:55 +01:00
a07a2f7496
compiler.codegen passes temp reg to %call-gc
2009-09-25 18:48:13 +01:00
4552e02624
made inline_gc a VM_C_API function
2009-09-25 18:29:07 +01:00
93149a6be9
Merge branch 'fix_stack_alignment' of git://github.com/phildawes/factor
2009-09-24 19:54:51 -05:00
f5c70d4ad7
make inline_gc regparm(3) and cleaned up %call-gc stack alignment
2009-09-24 21:45:56 +01:00
0686a7a65c
cpu.ppc: add representation hooks for shifts
2009-09-24 13:00:12 -05:00
cb497f009b
Merge branch 'vm_cleanup' of git://github.com/phildawes/factor
2009-09-24 04:31:55 -05:00
1b84f179cd
cpu.x86: don't generate SSE2 instructions if only SSE1 is available
2009-09-24 04:07:15 -05:00
abe3b869cf
cpu.ppc: fix compile errors
2009-09-24 03:55:01 -05:00
7b6128dd03
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
a3c84ea278
x86 bootstrap cleanup: renamed arg to arg1
2009-09-24 08:16:57 +01:00
d25fe552ab
removed superflous whitspace lines
2009-09-24 08:02:14 +01:00
e4d566b1c2
cpu.ppc: make it load
2009-09-24 00:13:27 -05:00
3d0c9c4337
cpu.ppc: fix typos
2009-09-23 23:38:17 -05:00
4ec566b15d
cpu.x86/ppc: unify register-to-register moves using %copy so that better coalescing can eliminate more moves later
2009-09-23 22:49:54 -05:00
3104aa3962
cpu.ppc: add dummy vector ops
2009-09-23 20:31:12 -05:00
dfc9fd071e
Add longlong-2, ulonglong-2, longlong-4, ulonglong-4 SIMD types, fix int-4 multiplication on SSE2
2009-09-23 20:23:25 -05:00
563ecbd871
cpu.x86.assembler: cleanup
2009-09-23 19:30:36 -05:00
6d4e5af088
cpu.x86.features: don't fold away sse-version, instead memoize it and recompute on startup
2009-09-23 05:13:15 -05:00
43fa252af5
math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
2009-09-23 02:47:14 -05:00
d23826906f
Merge branch 'master' into integer-simd
2009-09-22 20:21:40 -05:00
b0f87fd6a0
cpu.ppc: fix load errors
2009-09-22 05:24:34 -05:00
603a560eaf
cpu.x86: fix using list
2009-09-20 23:24:30 -05:00
9d90bdd439
Fix conflict
2009-09-20 23:18:07 -05:00
ea44ea3522
math.vectors.simd: add saturated arithmetic operations
2009-09-20 23:16:02 -05:00
acea55c692
math.vectors: add v+- word which is accelerated by SSE3
2009-09-20 17:43:16 -05:00
47d8763340
More integer SIMD work
...
- move generated vocab support from specialized-arrays to vocabs.generated
- add fuzz testing to math.vectors.simd
- add alien type support for integer SIMD vectors
- SIMD: parsing word generates a SIMD type, instead of pre-generating them all in math.vectors.simd
2009-09-20 16:48:17 -05:00
29c4512066
cpu.x86: cleanup
2009-09-20 04:17:34 -05:00
f8a91438cd
Merge Phil Dawes' VM work
2009-09-20 03:48:08 -05:00
e77341b90c
math.vectors.simd: redesign to be more flexible, integer SIMD work in progress
2009-09-20 02:08:32 -05:00
076ab42dc3
move some allocation words that don't really have much to do with c types out of alien.c-types into a new alien.data vocab
2009-09-17 22:36:05 -05:00
aa1edad078
disambiguate math:float in cpu.ppc
2009-09-17 19:10:40 -05:00
01d2ef415a
get compiler tests loading
2009-09-16 09:20:47 -05:00
c7b7517f36
small x86 asm cleanup
2009-09-16 08:22:17 +01:00
8a65f35c31
vm passed in primitives as arg0 for x86.64
2009-09-16 08:22:17 +01:00
4af25578d8
fixed up some alien boxing (x86 32 & 64)
2009-09-16 08:20:50 +01:00
0470b7d2c5
fixed vm ptr passing to to_value_struct
2009-09-16 08:20:50 +01:00
1b92721660
fixed vm ptr passing to box_small_struct
2009-09-16 08:20:50 +01:00
888eae9554
fixed vm ptr passing to box_value_struct
2009-09-16 08:20:50 +01:00
3345922330
quick test vocab for mt stuff
2009-09-16 08:20:50 +01:00
b02c602a89
added vm passing to some alien/boxing functions and added some vm asserts
2009-09-16 08:20:10 +01:00
5cd2fbb564
vm ptr passed to lazy_jit_compile on x86.64
2009-09-16 08:20:10 +01:00
be1b079eb5
Primitives now pass vm ptr on 64bit x86
2009-09-16 08:20:09 +01:00
0bc7c0c1d0
separated vm-1st-arg and vm-3rd-arg asm invoke words (needed for ppc & x86.64)
2009-09-16 08:20:09 +01:00
005549ba43
vm pointer passed to nest_stacks and unnest_stacks (win32)
2009-09-16 08:17:26 +01:00
cdb6304fef
Dev checkpoint
2009-09-16 08:17:26 +01:00
3b52df9e02
added vm ptr to x86.32 boxing asm
2009-09-16 08:16:33 +01:00
ff54a57eb3
added code to pass vm ptr to some unboxers
2009-09-16 08:16:32 +01:00
ff8f2b10ec
fixed up getenv compiler intrinsic to use vm struct userenv
2009-09-16 08:16:32 +01:00
5bb04857bf
moved cards_offset and decks_offset into vm struct (for x86)
2009-09-16 08:16:31 +01:00
c010afc345
nursery global variable moved into vm
2009-09-16 08:16:31 +01:00
0be499de8a
renamed to vm-field-offset. Slava's better at naming than me
2009-09-16 08:16:31 +01:00
0b0937cf0e
ppc asm to get stack_chain using vm ptr
2009-09-16 08:16:31 +01:00
88d3179358
Added a vm C-STRUCT, using it for struct offsets in x86 asm
2009-09-16 08:16:31 +01:00
9a37b6abb6
moved stack_chain into vm struct
2009-09-16 08:16:31 +01:00
465f06ebc2
throw_impl now forwards the vm ptr
2009-09-16 08:16:30 +01:00
4afc16e95b
passing vm ptr to lazy_jit_compile mostly working
2009-09-16 08:16:30 +01:00
6a193bb0d5
Added %vm-invoke to pass vm ptr to vm functions (x86.32 only, otherwise uses singleton vm)
2009-09-16 08:16:30 +01:00
57011aed51
vm ptr passed to primitives on X86.32 (other cpus still use singleton vm ptr)
2009-09-16 08:16:30 +01:00
3b4330fcf6
get things to a point where they bootstrap again
2009-09-15 21:43:18 -05:00
ab8abeaee4
Merge branch 'master' into c-type-words
2009-09-15 19:14:41 -05:00
4d16c569f0
struct classes now make their own C type without help from alien.structs. remove alien.structs dependencies from everywhere outside of alien and compiler, and have the FFI handle both alien.structs and classes.struct c-types
2009-09-15 17:38:49 -05:00
35b76b83af
convert compiler cpu backends to use c-type words
2009-09-15 16:08:42 -05:00
64cddef3e1
cpu.ppc: fix %single>double-float and %double>single-float
2009-09-10 13:04:58 -05:00
4d1e832f79
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-09 17:14:48 -05:00
c50a35c062
altivec instructions for powerpc assembler
2009-09-09 17:14:36 -05:00
ed09dfe3ae
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-09 13:56:20 -05:00
daff63071f
Fix the build
2009-09-09 13:44:54 -05:00
a01f693335
cpu.ppc: fix bootstrap
2009-09-08 23:53:51 -05:00
0e2a3e4292
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-08 22:34:17 -05:00
cd5133b233
cpu.x86: tweak SIMD intrinsics
2009-09-08 22:34:01 -05:00
f166797dd4
no really, update ppc for argument order changes
2009-09-08 22:21:00 -05:00
3003b9e5d0
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-08 21:58:25 -05:00
c95a7febb0
update cpu.ppc for argument order changes
2009-09-08 21:58:11 -05:00
8916fb7a3c
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-08 21:51:21 -05:00
7e2f0e5dbf
compiler: separate ##save-context instruction from ##alien-invoke, generate a ##save-context for libm calls, and add a pass to combine multiple context saves within a basic block. Fixes crashes with FP traps thrown by libm functions on x86-32
2009-09-08 21:50:55 -05:00
9be1f42fe9
typos in cpu.ppc
2009-09-08 21:44:11 -05:00
410d2bf0d0
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-08 19:35:14 -05:00
74fa73aeaf
Fix various test failures
2009-09-08 19:18:56 -05:00
d02d95ea34
Merge branch 'master' of git://factorcode.org/git/factor
2009-09-08 17:05:58 -05:00
0ea9949e51
split unordered and ordered float comparison intrinsics in compiler; generate only unordered comparisons for now
2009-09-08 17:04:26 -05:00
740a175e56
duplicate using
2009-09-08 17:02:31 -05:00
8b6ec8e030
cpu.x86.features: better wording
2009-09-08 14:17:05 -05:00
e5e7c1f725
cpu.x86.features: add -sse-version command-line switch to override SSE detection
2009-09-08 13:56:37 -05:00
1e5bc3b376
inline alien-vector and set-alien-vector if SIMD is not available for a small speedup
2009-09-08 13:56:17 -05:00
38c961cf6f
Fixes
2009-09-08 00:13:18 -05:00
bbca00e2ae
Fix conflicts
2009-09-07 23:51:25 -05:00
d47d747ebc
i had comisd/ucomisd backwards on x86
2009-09-04 12:30:30 -05:00
382e1d5b0e
fix some typos in cpu.ppc
2009-09-04 11:18:41 -05:00
92d5d8f0c5
Merge branch 'master' of git://factorcode.org/git/factor into ppc-float-compare
2009-09-04 10:58:50 -05:00
638e351131
update powerpc compiler to generate correct float comparisons
2009-09-04 10:51:12 -05:00
fc1bf07a1f
cpu.ppc: fix typo
2009-09-04 06:41:33 -05:00
e36a0d7ef4
compiler: clean up code generation for alien boxing/unboxing a bit
2009-09-03 21:22:43 -05:00
c480bec303
convert comparison branch code in compiler to use locals
2009-09-03 21:19:39 -05:00
4d5a4222b6
More SIMD work
...
- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
036ff77306
add compiler comparison codes for floating-point unordered comparisons; update x86 backend to generate proper code for all floating-point comparisons
2009-09-03 20:32:05 -05:00
3d4c04302a
Merge branch 'master' into simd
2009-09-03 03:45:58 -05:00
906a0d212a
Detect SSE version and enable the correct set of SIMD intrinsics
2009-09-03 03:28:38 -05:00
ff8c70dbe0
Initial implementation of SSE vector intrinsics:
...
- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
102df64ec7
i suck at reading tech docs--those were m64 instructions, not mm instructions
2009-09-02 12:58:35 -05:00
962d560c10
get rid of useless mm->xmm instructions in cpu.x86.assembler, add MOVHLPS and MOVLHPS
2009-09-02 11:06:08 -05:00
85a2bfab6c
compiler: eliminate boilerplate by centralizing info in declarative INSN: syntax
2009-09-02 06:22:37 -05:00
f91b539c31
cpu.ppc: implement fast float function calls; 3x speedup on benchmark.struct-arrays on PowerPC
2009-09-01 15:19:26 -05:00
6f1a7c731c
cpu.ppc: fix %box-displaced-alien
2009-08-30 20:56:04 -05:00
9595be4bf9
%box-displaced-alien: fix clobberage found by Doug
2009-08-30 05:11:08 -05:00
0db01f6d5f
compiler.cfg.linear-scan now supports partial sync-points where all registers are spilled; taking advantage of this, there are new trigonometric intrinsics which yield a 2x performance boost on benchmark.struct-arrays and a 25% boost on benchmark.partial-sums
2009-08-30 04:52:01 -05:00
2bb6293217
compiler: add fixnum-min/max intrinsics; ~10% speedup on benchmark.yuv-to-rgb
2009-08-28 19:02:59 -05:00
d957ae4e44
Performance improvements to make struct-arrays benchmark faster
...
- improved optimization of ##unbox-any-c-ptr on ##box-displaced-alien; convert it to ##unbox-c-ptr where possible using class info stored in the ##bda instruction
- make fcos, fsin, etc inline again; everything in math.libm inline again, except for fsqrt which is an intrinsic
- convert min and max on floats to float-min and float-max
- make min and max not inline, so that the above can work
- struct-arrays: rice a bit so that more fixnums come up
2009-08-28 05:21:16 -05:00
98f93f799b
cpu.ppc: fix ##box-displaced-alien
2009-08-27 04:43:45 -05:00
f662e6403a
compiler: new inline intrinsic for <displaced-alien> where the inputs have known types; value numbering now eliminates unnecessary allocation of displaced aliens if the result is immediately unboxed again
2009-08-27 00:06:19 -05:00
0df8aadce2
cpu.x86: use SQRTSD instruction for math.libm:fsqrt word
2009-08-25 23:22:15 -05:00
b7e29ca8dd
cpu.ppc.assembler: LOAD32 assembler macro was busted
2009-08-25 22:37:10 -05:00
1afd001393
basis/cpu: eliminate some usages of rot
2009-08-25 19:38:48 -05:00
7b2c9df341
cpu.ppc.assembler: fix FMR and FMR. opcodes
2009-08-25 19:33:35 -05:00
b14dd8ab67
cpu.ppc: integer>fixnum scratch area overlapped with the rest of stack frame, very bad
2009-08-22 20:23:28 -05:00
2c533472f8
Merge branch 'master' of git://factorcode.org/git/factor
2009-08-21 18:48:44 -05:00
9ab8734441
cpu.ppc: work in progress
2009-08-21 18:48:34 -05:00
3f3d57032b
Delete empty unit tests files, remove 1- and 1+, reorder IN: lines in a lot of places, minor refactoring
2009-08-13 19:21:44 -05:00
4b7ba38aab
compiler.cfg: virtual registers are integers now, and representations are stored off to the side. Fix bug in representation selection that would manifest if a value was used as a float and a fixnum in different branches; cannot globally unbox float in this case
2009-08-08 04:02:18 -05:00
725280d424
Split off the notion of a register representation from a register class
2009-08-07 17:44:50 -05:00
eb3bd1edea
cpu.x86.assembler: make some words private
2009-08-05 18:30:42 -05:00
61fe034e3e
cpu.ppc: put spill slots and GC roots in stack frame where subroutine calls can't clobber them
2009-07-31 23:47:07 -05:00
9a80fdb81b
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-31 17:59:00 -05:00
957a5b7b9b
cpu.ppc: fix small typos
2009-07-31 17:57:15 -05:00
3258f9c4ef
fix using list on win64
2009-07-31 16:27:18 -05:00
dd2dc2bb24
cpu.ppc: Updating PowerPC backend for codegen changes over the last two months: new shift intrinsics added, fixnum overflow intrinsics are now treated like conditionals, GC checks are more complex and have a different API
2009-07-30 21:44:22 -05:00
45770c6250
Move a bunch of GC check generation logic to platform-independent side
2009-07-30 21:28:27 -05:00
b43c8b40ac
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 19:11:02 -05:00
b6ddcafcbd
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 11:05:36 -05:00
455956b16c
add additional SSE2 packed integer operations
2009-07-30 11:05:12 -05:00
be363d1a5b
compiler.cfg: Get inline GC checks working again, using a dataflow analysis to compute uninitialized stack locations in compiler.cfg.stacks.uninitialized. Re-enable intrinsics which use inline allocation
2009-07-30 09:19:44 -05:00
cd7a1d6c58
Oopsie
2009-07-30 08:27:52 -05:00
d71e2f9577
cpu.x86: Fix shuffle bug. Shuffling bugs occurring in code that runs before optimizer/stack checker is online are only caught at runtime during bootstrap, what a pain
2009-07-30 05:12:40 -05:00
d81dec5d45
cpu.x86: fix a bug in small-register logic on 32-bit. Also, on 32-bit, we don't need to do any special register shuffling to work with 16-bit operands since all registers have 16-bit variants. So now only 8-bit operands on x86-32 require special treatment
2009-07-30 05:04:46 -05:00
a9977d7c79
cpu.x86: update non-optimizing compiler backends for assembler vocab split
2009-07-30 02:22:37 -05:00
1e8d13c1f1
cpu.x86.assembler: fix extended 8-bit registers (DIL, SIL, SPL, BPL)
2009-07-29 22:32:22 -05:00
8ca17d053c
cpu.x86: use full set of 8-bit, 16-bit and 32-bit registers on x86-64 to avoid clumsy save/restore logic
2009-07-29 21:56:37 -05:00
73862a9a03
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
09d89c0d17
Merge branch 'dcn'
2009-07-28 12:37:45 -05:00
9f3c8a9959
SSE4 opcodes for x86 assembler
2009-07-28 12:19:37 -05:00
4175585fd4
Merge branch 'master' into dcn
2009-07-28 11:20:43 -05:00
5372113fce
SSE1–SSSE3 opcodes + branch hints for x86 assembler
2009-07-28 00:22:27 -05:00
bfb2a4c1fc
cpu.x86: compile a load of zero, and adds, subs where dst = src1 more efficiently
2009-07-27 22:27:54 -05:00
3fb4fc1bde
Improve code generation for shift word: add intrinsics for fixnum-shift-fast in the case where the shift count is not constant, transform 1 swap shift into a more overflow check with open-coded fast case, transform bitand into fixnum-bitand in more cases
2009-07-16 23:50:48 -05:00
e76dce8aff
Overflowing fixnum intrinsics now expand into several CFG nodes. This speeds up the common case since only the uncommon case is now a stack syncpoint
2009-07-16 18:29:40 -05:00
768e2a5148
compiler.cfg: split off condition codes into a comparisons sub-vocabulary
2009-07-13 14:42:52 -05:00
1157f58f37
cpu.x86.32: don't emit sub %esp,0x0 in prologue on Linux and Windows
2009-07-01 18:13:45 -05:00
4db44cd23f
%dispatch: sometimes the generated sequence is one byte longer, so instead of hard-coding it, compute the right length
2009-06-30 18:11:15 -05:00
Slava Pestov
Joe Groff
Slava Pestov
Phil Dawes
Slava Pestov
sheeple
Daniel Ehrenberg
Doug Coleman