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655 Commits (645164188df1c45ec235cde4eb83bfac6fc19e99)

Author SHA1 Message Date
Joe Groff 645164188d compiler.cfg.instructions: ##select-vector instruction mapping to SSE4 PEXTR* 2010-05-16 00:50:19 -07:00
Slava Pestov 5b48cd2a63 FFI rewrite part 5: return value boxing and callback parameter boxing now uses vregs; simplify return value unboxing 2010-05-16 03:43:23 -04:00
Joe Groff 8c878ada17 compiler.cfg.instructions: ##gather-int-vector-2/4 instructions that map to SSE4 PINSR/PEXTR 2010-05-15 23:48:22 -07:00
Joe Groff 7c0cd6dc37 cpu.x86: fix bootstrap load error 2010-05-15 15:28:22 -07:00
Joe Groff 3de020c18a cpu.x86: don't enable bit-count intrinsic by default 2010-05-15 14:52:00 -07:00
Joe Groff 3956dd1516 cpu.x86.features: ( int alien-assembly ) c-bool> ==> ( bool alien-assembly ) 2010-05-15 14:33:19 -07:00
Joe Groff 009408dd11 cpu.x86: enable bit-count intrinsic if POPCNT available 2010-05-15 14:00:12 -07:00
Joe Groff 7fec53b509 compiler.cfg.instructions: ##bit-count insn 2010-05-15 13:57:35 -07:00
Joe Groff c00272d80a cpu.x86.features: add popcnt? test 2010-05-15 13:26:14 -07:00
Joe Groff d5b7ec3348 cpu.x86.assembler: SETcc instructions 2010-05-15 13:14:27 -07:00
Joe Groff 986ed057d8 cpu.x86.assembler: BT family instructions 2010-05-15 13:08:22 -07:00
Slava Pestov 62eadda2aa cpu.x86.bootstrap: use TEST instruction 2010-05-14 18:37:10 -04:00
Slava Pestov 5a67711bfd compiler.cfg: use x86 TEST instruction to optimize 'bitand 0 =' 2010-05-14 18:37:06 -04:00
Joe Groff 3766abd65e compiler.cfg.instructions: ##shuffle-vector-halves-imm insn to map to SSE's two-input SHUFPS/SHUFPD 2010-05-14 00:20:21 -07:00
Slava Pestov 4a98278720 cpu.x86.32: check for SSE2 on bootstrap since Factor now requires it 2010-05-13 18:25:46 -04:00
Slava Pestov 42b0d456cd Refactor x86-32 stack cleanup logic 2010-05-12 02:09:11 -04:00
Slava Pestov f89b85db7b Temporary fixes for x86-32 until FFI boxing is rewritten 2010-05-12 01:41:49 -04:00
Slava Pestov 1c76c87c5c cpu.x86.64: fix typo 2010-05-11 22:29:46 -04:00
Slava Pestov ee0640f176 Move flatten-c-type to death row so that it can be executed in part 5 2010-05-11 22:26:31 -04:00
Slava Pestov eb802208d1 FFI rewrite part 4: parameter and return value unboxing redesign 2010-05-11 19:11:44 -04:00
Slava Pestov 423f9c607a cpu.ppc: fixes 2010-05-10 17:50:10 -05:00
Slava Pestov 9321f9378a cpu.ppc: update for recent changes -- untested 2010-05-10 02:21:23 -04:00
Slava Pestov 45689dbfe6 compiler: simplify ##unbox-small/large-struct by emitting an ##unbox-any-c-ptr first 2010-05-10 01:38:34 -04:00
Slava Pestov 4478c3a51a FFI rewrite part 3: eliminate ##push-context-stack and ##pop-context-stack 2010-05-10 00:46:29 -04:00
Slava Pestov 7450dcf9ff cpu.x86.32: fix load error 2010-05-09 23:36:57 -04:00
Slava Pestov 7316d41226 FFI rewrite part 2: use ##peek and ##replace instructions to access stack 2010-05-09 23:26:43 -04:00
Slava Pestov 2912f21acc cpu.x86.64.unix: fix load error 2010-05-09 22:15:14 -04:00
Slava Pestov 839e26de3a cpu.x86.32: fix load error 2010-05-09 21:55:21 -04:00
Slava Pestov c211c3e84e FFI rewrite part 1: split up ##alien-invoke and friends into smaller instructions 2010-05-09 21:36:52 -04:00
Slava Pestov f988dad79c compiler.cfg: add ##load-float instruction for single precision floating point constants 2010-05-07 18:26:00 -04:00
Slava Pestov 627295f094 Language change: tuple slot setter words with stack effect ( value object -- ) are now named FOO<< instead of (>>FOO) 2010-05-06 17:21:02 -04:00
Slava Pestov 020c011d00 cpu.ppc: add missing cases to ##load/store-memory instructions 2010-05-05 13:37:25 -04:00
Slava Pestov aaa706dd29 cpu.x86.32: fix load error 2010-05-05 02:54:48 -04:00
Slava Pestov e763c74096 More FFI cleanups 2010-05-05 01:13:45 -04:00
Slava Pestov f3ea9288df cpu.ppc: updating optimizing compiler backend for recent changes 2010-05-04 05:51:54 -05:00
Slava Pestov 92a4b5ec7b cpu.ppc.assembler: new opcodes: LFDUX LFDX LFSUX LFSX STFDUX STFDX STFSUX STFSX 2010-05-04 05:47:21 -05:00
Slava Pestov fec408260e vm: tweak inline_gc() for PowerPC 2010-05-04 06:52:30 -04:00
Slava Pestov dd2a4c2c77 cpu.x86: GC root offsets were computed wrong in words containing alien calls 2010-05-04 02:53:53 -04:00
Slava Pestov 6c35652666 cpu: cleanups 2010-05-03 23:08:24 -04:00
Slava Pestov 86d89f3ff7 cpu.ppc: fixing typos in non-optimizing backend 2010-05-03 22:43:51 -04:00
Slava Pestov 652c4c28c6 cpu.x86.assembler: fix test on 64-bit 2010-05-03 20:16:13 -04:00
Slava Pestov bb3cea31ea cpu.ppc: updates for recent compiler changes, untested 2010-05-03 18:28:31 -04:00
Slava Pestov 58e4381eb1 compiler: new "binary literal area" at the end of a word's machine code stores constant floats and SIMD vectors; this allows ##load-reference/##load-memory fusion to be performed on x86-64, with a RIP-relative address reaching the data; also simplifies VM since custom relocation types used by the previous 32-bit-only optimization are no longer needed 2010-05-03 17:34:35 -04:00
Slava Pestov f5c5d8b44c compiler: remove flat machine representation and generate code directly from the CFG 2010-05-03 17:34:32 -04:00
Slava Pestov 428ba9fd0f compiler.cfg: fuse ##load-integer/##load-reference into ##replace to form ##replace-imm 2010-05-03 17:34:28 -04:00
Slava Pestov 9788323d25 compiler: add ##load-vector instruction to avoid wasting a temporary register on x86-32 2010-05-03 17:34:28 -04:00
Slava Pestov 1b4b66e341 cpu.x86: use available type info to generate more efficient %box-displaced-alien where possible 2010-05-03 17:34:27 -04:00
Slava Pestov 43f269e4eb Register allocation now uses SSA properties to coalesce values with different representations 2010-05-03 17:34:20 -04:00
Slava Pestov 95ff5ffe51 New GC checks work in progress 2010-05-03 17:34:16 -04:00
Slava Pestov 655497b7b4 cpu.x86.assembler: small cleanups 2010-05-03 17:34:15 -04:00